PIC18F2420/2520/4420/4520
The CCPRxH register and a 2-bit internal latch are
EQUATION 15-3:
used to double-buffer the PWM duty cycle. This
double-buffering is essential for glitchless PWM
operation.
FOSC
⎛
⎞
⎠
log ---------------
⎝
FPWM
PWM Resolution (max)
= ----------------------------- b i t s
log(2)
When the CCPRxH and 2-bit latch match TMR2,
concatenated with an internal 2-bit Q clock or 2 bits of
the TMR2 prescaler, the CCPx pin is cleared.
Note:
If the PWM duty cycle value is longer than
the PWM period, the CCPx pin will not be
cleared.
The maximum PWM resolution (bits) for a given PWM
frequency is given by the equation:
TABLE 15-4: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
PWM Frequency
2.44 kHz
9.77 kHz
39.06 kHz 156.25 kHz 312.50 kHz 416.67 kHz
Timer Prescaler (1, 4, 16)
PR2 Value
16
FFh
10
4
1
1
3Fh
8
1
1Fh
7
1
FFh
10
FFh
10
17h
6.58
Maximum Resolution (bits)
15.4.3
PWM AUTO-SHUTDOWN
(CCP1 ONLY)
15.4.4
SETUP FOR PWM OPERATION
The following steps should be taken when configuring
the CCP module for PWM operation:
The PWM auto-shutdown features of the Enhanced CCP
module are also available to CCP1 in 28-pin devices. The
operation of this feature is discussed in detail in
Section 16.4.7 “Enhanced PWM Auto-Shutdown”.
1. Set the PWM period by writing to the PR2
register.
2. Set the PWM duty cycle by writing to the
CCPRxL register and CCPxCON<5:4> bits.
Auto-shutdown features are not available for CCP2.
3. Make the CCPx pin an output by clearing the
appropriate TRIS bit.
4. Set the TMR2 prescale value, then enable
Timer2 by writing to T2CON.
5. Configure the CCPx module for PWM operation.
© 2008 Microchip Technology Inc.
DS39631E-page 145
MICROCHIP [ MICROCHIP ]
