欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC18F4580-I/PT 参数 Datasheet PDF下载

PIC18F4580-I/PT图片预览
型号: PIC18F4580-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与ECAN技术, 10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 490 页 / 8912 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F4580-I/PT的Datasheet PDF文件第58页浏览型号PIC18F4580-I/PT的Datasheet PDF文件第59页浏览型号PIC18F4580-I/PT的Datasheet PDF文件第60页浏览型号PIC18F4580-I/PT的Datasheet PDF文件第61页浏览型号PIC18F4580-I/PT的Datasheet PDF文件第63页浏览型号PIC18F4580-I/PT的Datasheet PDF文件第64页浏览型号PIC18F4580-I/PT的Datasheet PDF文件第65页浏览型号PIC18F4580-I/PT的Datasheet PDF文件第66页  
PIC18F2480/2580/4480/4580  
TABLE 5-4:  
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)  
MCLR Resets,  
Power-on Reset,  
Brown-out Reset  
WDT Reset,  
RESETInstruction,  
Stack Resets  
Wake-up via WDT  
or Interrupt  
Register  
Applicable Devices  
RXF3SIDL  
RXF3SIDH  
RXF2EIDL  
RXF2EIDH  
RXF2SIDL  
RXF2SIDH  
RXF1EIDL  
RXF1EIDH  
RXF1SIDL  
RXF1SIDH  
RXF0EIDL  
RXF0EIDH  
RXF0SIDL  
RXF0SIDH  
B5D7(6)  
B5D6(6)  
B5D5(6)  
B5D4(6)  
B5D3(6)  
B5D2(6)  
B5D1(6)  
B5D0(6)  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
xxx- x-xx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxx- x-xx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxx- x-xx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxx- x-xx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
-xxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx x-xx  
xxxx x-xx  
0000 0000  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
uuu- u-uu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuu- u-uu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuu- u-uu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuu- u-uu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
-uuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu u-uu  
uuuu u-uu  
0000 0000  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuu- u-uu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuu- u-uu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuu- u-uu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuu- u-uu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
-uuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu u-uu  
uuuu u-uu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
B5DLC(6)  
B5EIDL(6)  
B5EIDH(6)  
B5SIDL(6)  
B5SIDH(6)  
B5CON(6)  
B4D7(6)  
B4D6(6)  
B4D5(6)  
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ‘0’, q= value depends on condition.  
Shaded cells indicate conditions do not apply for the designated device.  
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).  
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt  
vector (0008h or 0018h).  
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are  
updated with the current value of the PC. The STKPTR is modified to point to the next location in the  
hardware stack.  
4: See Table 5-3 for Reset value for specific condition.  
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When  
not enabled as PORTA pins, they are disabled and read ‘0’.  
6: This register reads all ‘0’s until ECAN™ technology is set up in Mode 1 or Mode 2.  
DS39637D-page 62  
© 2009 Microchip Technology Inc.  
 复制成功!