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PIC18F4580-I/PT 参数 Datasheet PDF下载

PIC18F4580-I/PT图片预览
型号: PIC18F4580-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与ECAN技术, 10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 490 页 / 8912 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2480/2580/4480/4580  
TABLE 5-4:  
Register  
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)  
MCLR Resets,  
WDT Reset,  
Power-on Reset,  
Brown-out Reset  
Wake-up via WDT  
or Interrupt  
Applicable Devices  
RESETInstruction,  
Stack Resets  
B4D4(6)  
B4D3(6)  
B4D2(6)  
B4D1(6)  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
2480 2580 4480 4580  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
-xxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx x-xx  
xxxx xxxx  
0000 0000  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
-xxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx x-xx  
xxxx xxxx  
0000 0000  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
-uuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu u-uu  
uuuu uuuu  
0000 0000  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
-uuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu u-uu  
uuuu uuuu  
0000 0000  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
-uuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu u-uu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
-uuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu u-uu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
B4D0(6)  
B4DLC(6)  
B4EIDL(6)  
B4EIDH(6)  
B4SIDL(6)  
B4SIDH(6)  
B4CON(6)  
B3D7(6)  
B3D6(6)  
B3D5(6)  
B3D4(6)  
B3D3(6)  
B3D2(6)  
B3D1(6)  
B3D0(6)  
B3DLC(6)  
B3EIDL(6)  
B3EIDH(6)  
B3SIDL(6)  
B3SIDH(6)  
B3CON(6)  
B2D7(6)  
B2D6(6)  
B2D5(6)  
B2D4(6)  
B2D3(6)  
B2D2(6)  
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ‘0’, q= value depends on condition.  
Shaded cells indicate conditions do not apply for the designated device.  
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).  
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt  
vector (0008h or 0018h).  
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are  
updated with the current value of the PC. The STKPTR is modified to point to the next location in the  
hardware stack.  
4: See Table 5-3 for Reset value for specific condition.  
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When  
not enabled as PORTA pins, they are disabled and read ‘0’.  
6: This register reads all ‘0’s until ECAN™ technology is set up in Mode 1 or Mode 2.  
© 2009 Microchip Technology Inc.  
DS39637D-page 63  
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