PIC18F4580-I/PT 参数 Datasheet PDF下载

型号：	PIC18F4580-I/PT
PDF下载：	下载PDF文件查看货源
内容描述：	28 /40/ 44引脚增强型闪存微控制器与ECAN技术， 10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology]
分类和应用：	闪存微控制器和处理器外围集成电路时钟
文件页数/大小：	490 页 / 8912 K
品牌：	MICROCHIP [ MICROCHIP ]

PIC18F2480/2580/4480/4580

TABLE 5-4:

INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

MCLR Resets,

Power-on Reset,

Brown-out Reset

WDT Reset,

RESETInstruction,

Stack Resets

Wake-up via WDT

or Interrupt

Applicable Devices

RXF13EIDL⁽⁶⁾2480 2580 4480 4580

RXF13EIDH⁽⁶⁾2480 2580 4480 4580

RXF13SIDL⁽⁶⁾2480 2580 4480 4580

RXF13SIDH⁽⁶⁾2480 2580 4480 4580

RXF12EIDL⁽⁶⁾2480 2580 4480 4580

RXF12EIDH⁽⁶⁾2480 2580 4480 4580

RXF12SIDL⁽⁶⁾2480 2580 4480 4580

RXF12SIDH⁽⁶⁾2480 2580 4480 4580

RXF11EIDL⁽⁶⁾2480 2580 4480 4580

RXF11EIDH⁽⁶⁾2480 2580 4480 4580

RXF11SIDL⁽⁶⁾2480 2580 4480 4580

RXF11SIDH⁽⁶⁾2480 2580 4480 4580

RXF10EIDL⁽⁶⁾2480 2580 4480 4580

RXF10EIDH⁽⁶⁾2480 2580 4480 4580

RXF10SIDL⁽⁶⁾2480 2580 4480 4580

RXF10SIDH⁽⁶⁾2480 2580 4480 4580

xxxx xxxx

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xxx- x-xx

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uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

-uuu uuuu

RXF9EIDL⁽⁶⁾

RXF9EIDH⁽⁶⁾2480 2580 4480 4580

RXF9SIDL⁽⁶⁾

2480 2580 4480 4580

RXF9SIDH⁽⁶⁾2480 2580 4480 4580

RXF8EIDL⁽⁶⁾

2480 2580 4480 4580

RXF8EIDH⁽⁶⁾2480 2580 4480 4580

RXF8SIDL⁽⁶⁾

2480 2580 4480 4580

RXF8SIDH⁽⁶⁾2480 2580 4480 4580

RXF7EIDL⁽⁶⁾

2480 2580 4480 4580

RXF7EIDH⁽⁶⁾2480 2580 4480 4580

RXF7SIDL⁽⁶⁾

2480 2580 4480 4580

RXF7SIDH⁽⁶⁾2480 2580 4480 4580

RXF6EIDL⁽⁶⁾

2480 2580 4480 4580

RXF6EIDH⁽⁶⁾2480 2580 4480 4580

RXF6SIDL⁽⁶⁾

2480 2580 4480 4580

RXF6SIDH⁽⁶⁾2480 2580 4480 4580

2480 2580 4480 4580

Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ‘0’, q= value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

4: See Table 5-3 for Reset value for specific condition.

5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When

not enabled as PORTA pins, they are disabled and read ‘0’.

6: This register reads all ‘0’s until ECAN™ technology is set up in Mode 1 or Mode 2.

DS39637D-page 66

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