PIC18F2480/2580/4480/4580
MULLW
Multiply Literal with W
MULWF
Multiply W with f
Syntax:
MULLW
k
Syntax:
MULWF f {,a}
Operands:
Operation:
Status Affected:
Encoding:
Description:
0 ≤ k ≤ 255
Operands:
0 ≤ f ≤ 255
a ∈ [0,1]
(W) x k → PRODH:PRODL
Operation:
(W) x (f) → PRODH:PRODL
None
Status Affected:
Encoding:
None
0000
1101
kkkk
kkkk
0000
001a
ffff
ffff
An unsigned multiplication is carried
out between the contents of W and the
8-bit literal ‘k’. The 16-bit result is
placed in the PRODH:PRODL register
pair. PRODH contains the high byte.
Description:
An unsigned multiplication is carried
out between the contents of W and the
register file location ‘f’. The 16-bit
result is stored in the PRODH:PRODL
register pair. PRODH contains the
high byte. Both W and ‘f’ are
W is unchanged.
None of the Status flags are affected.
unchanged.
Note that neither overflow nor carry is
possible in this operation. A zero result
is possible but not detected.
None of the Status flags are affected.
Note that neither overflow nor carry is
possible in this operation. A zero
result is possible but not detected.
Words:
Cycles:
1
1
If ‘a’ is ‘0’, the Access Bank is
selected. If ‘a’ is ‘1’, the BSR is used
to select the GPR bank.
Q Cycle Activity:
Q1
Q2
Q3
Q4
If ‘a’ is ‘0’ and the extended
Decode
Read
literal ‘k’
Process
Data
Write
instruction set is enabled, this
instruction operates in Indexed Literal
Offset Addressing mode whenever
f ≤ 95 (5Fh). See Section 26.2.3
“Byte-Oriented and Bit-Oriented
Instructions in Indexed Literal Offset
Mode” for details.
registers
PRODH:
PRODL
Example:
MULLW
0C4h
E2h
?
?
Before Instruction
W
PRODH
PRODL
=
=
=
Words:
Cycles:
1
1
After Instruction
Q Cycle Activity:
Q1
W
PRODH
PRODL
=
=
=
E2h
ADh
08h
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write
registers
PRODH:
PRODL
Example:
MULWF
REG, 1
Before Instruction
W
=
=
=
=
C4h
REG
B5h
?
PRODH
PRODL
?
After Instruction
W
=
=
=
=
C4h
B5h
8Ah
94h
REG
PRODH
PRODL
DS39637D-page 394
© 2009 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
