PIC18F2480/2580/4480/4580
MOVLW
Move Literal to W
MOVWF
Move W to f
Syntax:
MOVLW
k
Syntax:
MOVWF f {,a}
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
0 ≤ k ≤ 255
k → W
None
Operands:
0 ≤ f ≤ 255
a ∈ [0,1]
Operation:
(W) → f
Status Affected:
Encoding:
None
0000
1110
kkkk
kkkk
0110
111a
ffff
ffff
The eight-bit literal ‘k’ is loaded into W.
Description:
Move data from W to register ‘f’.
Location ‘f’ can be anywhere in the
256-byte bank.
1
1
Cycles:
Q Cycle Activity:
Q1
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank.
Q2
Q3
Q4
Decode
Read
literal ‘k’
Process
Data
Write to W
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 26.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
Example:
MOVLW
5Ah
After Instruction
W
=
5Ah
Words:
Cycles:
1
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write
register ‘f’
Example:
MOVWF
REG, 0
Before Instruction
W
REG
=
=
4Fh
FFh
After Instruction
W
REG
=
=
4Fh
4Fh
© 2009 Microchip Technology Inc.
DS39637D-page 393
MICROCHIP [ MICROCHIP ]
