PIC18F2480/2580/4480/4580
TABLE 24-1: CAN CONTROLLER REGISTER MAP (CONTINUED)
Address(1)
Name
(4)
D7Fh
D7Eh
D7Dh
D7Ch
D7Bh
D7Ah
D79h
D78h
D77h
D76h
D75h
D74h
D73h
D72h
D71h
D70h
D6Fh
D6Eh
D6Dh
D6Ch
D6Bh
D6Ah
D69h
D68h
D67h
D66h
D65h
D64h
D63h
D62h
D61h
D60h
—
(4)
—
(4)
—
(4)
—
RXF11EIDL
RXF11EIDH
RXF11SIDL
RXF11SIDH
RXF10EIDL
RXF10EIDH
RXF10SIDL
RXF10SIDH
RXF9EIDL
RXF9EIDH
RXF9SIDL
RXF9SIDH
(4)
—
(4)
—
(4)
—
(4)
—
RXF8EIDL
RXF8EIDH
RXF8SIDL
RXF8SIDH
RXF7EIDL
RXF7EIDH
RXF7SIDL
RXF7SIDH
RXF6EIDL
RXF6EIDH
RXF6SIDL
RXF6SIDH
Note 1: Shaded registers are available in Access Bank low area while the rest are available in Bank 15.
2: CANSTAT register is repeated in these locations to simplify application firmware. Unique names are given
for each instance of the controller register due to the Microchip header file requirement.
3: These registers are not CAN registers.
4: Unimplemented registers are read as ‘0’.
© 2009 Microchip Technology Inc.
DS39637D-page 329
MICROCHIP [ MICROCHIP ]
