PIC18F2480/2580/4480/4580
TABLE 11-3: PORTB I/O SUMMARY
Pin Name
Function
I/O
TRIS Buffer
Description
RB0/INT0/FLT0/AN10
RB0
OUT
IN
0
1
1
1
1
DIG
TTL
ST
LATB<0> data output.
PORTB<0> data input. Weak pull-up available only in this mode.
External Interrupt 0 input.
INT0
IN
(1)
FLT0
IN
ST
Enhanced PWM Fault input.
AN10
RB1
IN
ANA A/D Input Channel 10. Enabled on POR, this analog input overrides
the digital input (read as clear – low level).
RB1/INT1/AN8
OUT
IN
0
1
1
1
DIG
TTL
ST
LATB<1> data output.
PORTB<1> data input. Weak pull-up available only in this mode.
External Interrupt 1 input.
INT1
AN8
IN
IN
ANA A/D Input Channel 8. Enabled on POR; this analog input overrides
the digital input (read as clear – low level).
RB2/INT2/CANTX
RB2
OUT
IN
x
1
1
1
DIG
TTL
ST
LATB<2> data output.
PORTB<2> data input. Weak pull-up available only in this mode.
External Interrupt 2 input.
INT2
IN
CANTX
OUT
DIG
CAN transmit signal output. The CAN interface overrides the
TRIS<2> control when enabled.
RB3/CANRX
RB3
OUT
IN
0
1
1
DIG
TTL
ST
LATB<3> data output.
PORTB<3> data input. Weak pull-up available only in this mode.
CANRX
RB4
IN
CAN receive signal input. Pin must be configured as a digital input by
setting TRISB<3>.
RB4/KBI0/AN9
OUT
IN
0
1
1
1
DIG
TTL
TTL
LATB<4> data output.
PORTB<4> data input. Weak pull-up available only in this mode.
Interrupt-on-pin change.
KBI0
AN9
IN
IN
ANA A/D Input Channel 9. Enabled on POR; this analog input overrides
the digital input (read as clear – low level).
RB5/KBI1/PGM
RB5
OUT
IN
0
1
1
x
DIG
TTL
TTL
ST
LATB<5> data output.
PORTB<5> data input. Weak pull-up available only in this mode.
Interrupt-on-pin change.
KBI1
PGM
IN
IN
Low-Voltage Programming mode entry (ICSP™). Enabling this
function overrides digital output.
RB6/KBI2/PGC
RB7/KBI3/PGD
RB6
OUT
IN
0
1
1
x
0
1
1
x
x
DIG
TTL
TTL
ST
LATB<6> data output.
PORTB<6> data input. Weak pull-up available only in this mode.
Interrupt-on-pin change.
KBI2
PGC
RB7
IN
IN
Low-Voltage Programming mode entry (ICSP) clock input.
LATB<7> data output.
OUT
IN
DIG
TTL
TTL
DIG
ST
PORTB<7> data input. Weak pull-up available only in this mode.
Interrupt-on-pin change.
KBI3
PGD
IN
OUT
IN
Low-Voltage Programming mode entry (ICSP) clock output.
Low-Voltage Programming mode entry (ICSP) clock input.
Legend:
OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input
Note 1: Available on 40/44-pin devices only.
© 2009 Microchip Technology Inc.
DS39637D-page 139
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