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PIC18F24J10-I/SO 参数 Datasheet PDF下载

PIC18F24J10-I/SO图片预览
型号: PIC18F24J10-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能, RISC微控制器 [28/40/44-Pin High-Performance, RISC Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 368 页 / 5652 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F45J10 FAMILY  
10.1.3  
INTERFACING TO A 5V SYSTEM  
10.2 PORTA, TRISA and LATA Registers  
Though the VDDMAX of the PIC18F45J10 family is 3.6V,  
these devices are still capable of interfacing with 5V  
systems, even if the VIH of the target system is above  
3.6V. This is accomplished by adding a pull-up resistor  
to the port pin (Figure 10-2), clearing the LAT bit for that  
pin and manipulating the corresponding TRIS bit  
(Figure 10-1) to either allow the line to be pulled high or  
to drive the pin low. Only port pins that are tolerant of  
voltages up to 5.5V can be used for this type of  
interface (refer to Section 10.1.2 “Input Pins and  
Voltage Considerations”).  
PORTA is a 5-bit wide, bidirectional port. The corre-  
sponding Data Direction register is TRISA. Setting a  
TRISA bit (= 1) will make the corresponding PORTA pin  
an input (i.e., put the corresponding output driver in a  
high-impedance mode). Clearing a TRISA bit (= 0) will  
make the corresponding PORTA pin an output (i.e., put  
the contents of the output latch on the selected pin).  
Reading the PORTA register reads the status of the  
pins, whereas writing to it, will write to the port latch.  
The Data Latch (LATA) register is also memory mapped.  
Read-modify-write operations on the LATA register read  
and write the latched output value for PORTA.  
FIGURE 10-2:  
+5V SYSTEM HARDWARE  
INTERFACE  
The other PORTA pins are multiplexed with analog  
inputs, the analog VREF+ and VREF- inputs and the com-  
parator voltage reference output. The operation of pins  
RA<3:0> and RA5 as A/D converter inputs is selected  
by clearing or setting the control bits in the ADCON1  
register (A/D Control Register 1).  
+5V  
+5V Device  
PIC18F45J10  
Pins RA0 and RA3 may also be used as comparator  
inputs and RA5 may be used as the C2 comparator  
output by setting the appropriate bits in the CMCON  
register. To use RA<3:0> as digital inputs, it is also  
necessary to turn off the comparators.  
RD7  
Note:  
On a Power-on Reset, RA5 and RA<3:0>  
are configured as analog inputs and read  
as ‘0’.  
EXAMPLE 10-1:  
COMMUNICATING WITH  
THE +5V SYSTEM  
All PORTA pins have TTL input levels and full CMOS  
output drivers.  
BCF LATD, 7  
; set up LAT register so  
; changing TRIS bit will  
; drive line low  
The TRISA register controls the direction of the PORTA  
pins, even when they are being used as analog inputs.  
The user must ensure the bits in the TRISA register are  
maintained set when using them as analog inputs.  
BCF TRISD, 7 ; send a 0 to the 5V system  
BCF TRISD, 7 ; send a 1 to the 5V system  
EXAMPLE 10-2:  
INITIALIZING PORTA  
CLRF  
PORTA  
; Initialize PORTA by  
; clearing output  
; data latches  
CLRF  
LATA  
; Alternate method  
; to clear output  
; data latches  
MOVLW  
MOVWF  
MOVWF  
MOVWF  
MOVLW  
07h  
ADCON1  
07h  
CMCON  
0CFh  
; Configure A/D  
; for digital inputs  
; Configure comparators  
; for digital input  
; Value used to  
; initialize data  
; direction  
MOVWF  
TRISA  
; Set RA<3:0> as inputs  
; RA<5:4> as outputs  
DS39682E-page 98  
© 2009 Microchip Technology Inc.