PIC18F45J10 FAMILY
10.0
I/O PORTS
10.1
I/O Port Pin Capabilities
Depending on the device selected and features
enabled, there are up to five ports available. Some pins
of the I/O ports are multiplexed with an alternate
function from the peripheral features on the device. In
general, when a peripheral is enabled, that pin may not
be used as a general purpose I/O pin.
Each port has three registers for its operation. These
registers are:
• TRIS register (Data Direction register)
• PORT register (reads the levels on the pins of the
device)
• LAT register (Data Latch register)
The Data Latch (LAT register) is useful for read-modify-
write operations on the value that the I/O pins are
driving.
A simplified model of a generic I/O port, without the
interfaces to other peripherals, is shown in Figure 10-1.
When developing an application, the capabilities of the
port pins must be considered. Outputs on some pins
have higher output drive strength than others. Similarly,
some pins can tolerate higher than V
DD
input levels.
10.1.1
PIN OUTPUT DRIVE
The output pin drive strengths vary for groups of pins
intended to meet the needs for a variety of applications.
PORTB and PORTC are designed to drive higher
loads, such as LEDs. All other ports are designed for
small loads, typically indication only. Table 10-1 sum-
marizes the output capabilities. Refer to
for more details.
TABLE 10-1:
Port
PORTA
PORTD
PORTE
PORTB
PORTC
OUTPUT DRIVE LEVELS
Drive
Description
Minimum Intended for indication.
Suitable for direct LED drive
levels.
FIGURE 10-1:
GENERIC I/O PORT
OPERATION
High
RD LAT
Data
Bus
WR LAT
or PORT
10.1.2
D
CK
Data Latch
D
Q
Q
I/O pin
INPUT PINS AND VOLTAGE
CONSIDERATIONS
WR TRIS
CK
TRIS Latch
Input
Buffer
The voltage tolerance of pins used as device inputs is
dependent on the pin’s input function. Pins that are used
as digital only inputs are able to handle DC voltages up
to 5.5V; a level typical for digital logic circuits. In contrast,
pins that also have analog input functions of any kind
can only tolerate voltages up to V
DD
. Voltage excursions
beyond V
DD
on these pins should be avoided. Table 10-
for more
details.
RD TRIS
TABLE 10-2:
Q
D
INPUT VOLTAGE LEVELS
Tolerated
Input
Description
Port or Pin
EN
EN
RD PORT
PORTA<5:0>
PORTB<5:0>
PORTC<1:0>
PORTE<2:0>
PORTB<7:6>
PORTC<7:2>
PORTD<7:0>
5.5V
Tolerates input levels
above V
DD
, useful for
most standard logic.
V
DD
Only V
DD
input levels
tolerated.
©
2009 Microchip Technology Inc.
DS39682E-page 97
MICROCHIP [ MICROCHIP TECHNOLOGY ]
