PIC18F45J10 FAMILY
9.5
RCON Register
The RCON register contains bits used to determine the
cause of the last Reset or wake-up from Idle or Sleep
modes. RCON also contains the bit that enables
interrupt priorities (IPEN).
REGISTER 9-13: RCON: RESET CONTROL REGISTER
R/W-0
IPEN
U-0
—
R/W-1
CM
R/W-1
RI
R-1
TO
R-1
PD
R/W-0
POR
R/W-0
BOR
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7
IPEN: Interrupt Priority Enable bit
1= Enable priority levels on interrupts
0= Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
bit 6
bit 5
Unimplemented: Read as ‘0’
CM: Configuration Mismatch Flag bit
For details of bit operation, see Register 5-1.
RI: RESETInstruction Flag bit
bit 4
bit 3
bit 2
bit 1
bit 0
For details of bit operation, see Register 5-1.
TO: Watchdog Timer Time-out Flag bit
For details of bit operation, see Register 5-1.
PD: Power-Down Detection Flag bit
For details of bit operation, see Register 5-1.
POR: Power-on Reset Status bit
For details of bit operation, see Register 5-1.
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 5-1.
DS39682E-page 94
© 2009 Microchip Technology Inc.
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