PIC18F45J10 FAMILY
TABLE 10-3: PORTA I/O SUMMARY
TRIS
Setting
I/O
Type
Pin
RA0/AN0
Function
I/O
Description
RA0
0
1
1
O
I
DIG LATA<0> data output; not affected by analog input.
TTL PORTA<0> data input; disabled when analog input enabled.
AN0
RA1
I
ANA A/D Input Channel 0 and Comparator C1- input. Default input
configuration on POR; does not affect digital output.
RA1/AN1
0
1
1
O
I
DIG LATA<1> data output; not affected by analog input.
TTL PORTA<1> data input; disabled when analog input enabled.
AN1
RA2
I
ANA A/D Input Channel 1 and Comparator C2- input. Default input
configuration on POR; does not affect digital output.
RA2/AN2/
VREF-/CVREF
0
1
1
O
I
DIG LATA<2> data output; not affected by analog input. Disabled when
CVREF output enabled.
TTL PORTA<2> data input. Disabled when analog functions enabled;
disabled when CVREF output enabled.
AN2
I
ANA A/D Input Channel 2 and Comparator C2+ input. Default input
configuration on POR; not affected by analog output.
VREF-
1
x
I
ANA A/D and comparator voltage reference low input.
CVREF
O
ANA Comparator voltage reference output. Enabling this feature disables
digital I/O.
RA3/AN3/VREF+
RA3
AN3
0
1
1
O
I
DIG LATA<3> data output; not affected by analog input.
TTL PORTA<3> data input; disabled when analog input enabled.
I
ANA A/D Input Channel 3 and Comparator C1+ input. Default input
configuration on POR.
VREF+
RA5
1
0
1
1
1
0
x
x
x
x
I
O
I
ANA A/D and comparator voltage reference high input.
DIG LATA<5> data output; not affected by analog input.
TTL PORTA<5> data input; disabled when analog input enabled.
ANA A/D Input Channel 4. Default configuration on POR.
TTL Slave select input for MSSP1 (MSSP1 module).
DIG Comparator 2 output; takes priority over port data.
ANA Main oscillator feedback output connection (HS mode).
DIG System cycle clock output (FOSC/4) in RC and EC Oscillator modes.
ANA Main oscillator input connection.
RA5/AN4/SS1/
C2OUT
AN4
SS1
I
I
C2OUT
OSC2
CLKO
OSC1
CLKI
O
O
O
I
OSC2/CLKO
OSC1/CLKI
I
ANA Main clock input connection.
Legend:
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x= Don’t care (TRIS bit does not affect port direction or is overridden for this option).
© 2009 Microchip Technology Inc.
DS39682E-page 99
MICROCHIP [ MICROCHIP ]
