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PIC18F2450-I/SO 参数 Datasheet PDF下载

PIC18F2450-I/SO图片预览
型号: PIC18F2450-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚,高性能, 12 MIPS ,增强型闪存, USB微控制器采用纳瓦技术 [28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 320 页 / 5591 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2450/4450  
The CALL and GOTO instructions have the absolute  
program memory address embedded into the  
instruction. Since instructions are always stored on word  
boundaries, the data contained in the instruction is a  
word address. The word address is written to PC<20:1>,  
which accesses the desired byte address in program  
memory. Instruction #2 in Figure 5-4 shows how the  
instruction, GOTO 0006h, is encoded in the program  
memory. Program branch instructions, which encode a  
relative address offset, operate in the same manner. The  
offset value stored in a branch instruction represents the  
number of single-word instructions that the PC will be  
offset by. Section 19.0 “Instruction Set Summary”  
provides further details of the instruction set.  
5.2.3  
INSTRUCTIONS IN PROGRAM  
MEMORY  
The program memory is addressed in bytes.  
Instructions are stored as two bytes or four bytes in  
program memory. The Least Significant Byte of an  
instruction word is always stored in a program memory  
location with an even address (LSb = 0). To maintain  
alignment with instruction boundaries, the PC  
increments in steps of 2 and the LSb will always read  
0’ (see Section 5.1.1 “Program Counter”).  
Figure 5-4 shows an example of how instruction words  
are stored in the program memory.  
FIGURE 5-4:  
INSTRUCTIONS IN PROGRAM MEMORY  
Word Address  
LSB = 1  
LSB = 0  
Program Memory  
Byte Locations →  
000000h  
000002h  
000004h  
000006h  
000008h  
00000Ah  
00000Ch  
00000Eh  
000010h  
000012h  
000014h  
Instruction 1:  
Instruction 2:  
MOVLW  
GOTO  
055h  
0Fh  
EFh  
F0h  
C1h  
F4h  
55h  
03h  
00h  
23h  
56h  
0006h  
Instruction 3:  
MOVFF  
123h, 456h  
used by the instruction sequence. If the first word is  
skipped for some reason and the second word is  
executed by itself, a NOP is executed instead. This is  
necessary for cases when the two-word instruction is  
preceded by a conditional instruction that changes the  
PC. Example 5-4 shows how this works.  
5.2.4  
TWO-WORD INSTRUCTIONS  
The standard PIC18 instruction set has four two-word  
instructions: CALL, MOVFF, GOTO and LSFR. In all  
cases, the second word of the instructions always has  
1111’ as its four Most Significant bits; the other 12 bits  
are literal data, usually a data memory address.  
Note:  
See Section 5.5 “Program Memory and  
the Extended Instruction Set” for  
information on two-word instruction in the  
extended instruction set.  
The use of ‘1111’ in the 4 MSbs of an instruction  
specifies a special form of NOP. If the instruction is  
executed in proper sequence, immediately after the  
first word, the data in the second word is accessed and  
EXAMPLE 5-4:  
CASE 1:  
TWO-WORD INSTRUCTIONS  
Object Code  
Source Code  
0110 0110 0000 0000 TSTFSZ  
REG1  
REG1, REG2 ; No, skip this word  
; Execute this word as a NOP  
; continue code  
; is RAM location 0?  
1100 0001 0010 0011  
1111 0100 0101 0110  
0010 0100 0000 0000  
CASE 2:  
MOVFF  
ADDWF  
REG3  
Object Code  
Source Code  
TSTFSZ  
0110 0110 0000 0000  
1100 0001 0010 0011  
1111 0100 0101 0110  
0010 0100 0000 0000  
REG1  
; is RAM location 0?  
MOVFF  
REG1, REG2 ; Yes, execute this word  
; 2nd word of instruction  
ADDWF  
REG3  
; continue code  
DS39760A-page 58  
Advance Information  
© 2006 Microchip Technology Inc.  
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