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PIC18F25J10-I/SS 参数 Datasheet PDF下载

PIC18F25J10-I/SS图片预览
型号: PIC18F25J10-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能, RISC微控制器 [28/40/44-Pin High-Performance, RISC Microcontrollers]
分类和应用: 微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 368 页 / 5652 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F45J10 FAMILY  
The pins of the Enhanced USART are multiplexed  
with PORTC. In order to configure RC6/TX/CK and  
RC7/RX/DT as an EUSART:  
17.0 ENHANCED UNIVERSAL  
SYNCHRONOUS  
ASYNCHRONOUS RECEIVER  
TRANSMITTER (EUSART)  
• bit SPEN (RCSTA<7>) must be set (= 1)  
• bit TRISC<7> must be set (= 1)  
• bit TRISC<6> must be set (= 1)  
The Enhanced Universal Synchronous Asynchronous  
Receiver Transmitter (EUSART) module is one of the  
two serial I/O modules. (Generically, the USART is also  
known as a Serial Communications Interface or SCI.)  
The EUSART can be configured as a full-duplex,  
asynchronous system that can communicate with  
peripheral devices, such as CRT terminals and  
personal computers. It can also be configured as a half-  
duplex synchronous system that can communicate  
with peripheral devices, such as A/D or D/A integrated  
circuits, serial EEPROMs, etc.  
Note:  
The EUSART control will automatically  
reconfigure the pin from input to output as  
needed.  
The operation of the Enhanced USART module is  
controlled through three registers:  
• Transmit Status and Control (TXSTA)  
• Receive Status and Control (RCSTA)  
• Baud Rate Control (BAUDCON)  
These are detailed on the following pages in  
Register 17-1, Register 17-2 and Register 17-3,  
respectively.  
The Enhanced USART module implements additional  
features, including automatic baud rate detection and  
calibration, automatic wake-up on Sync Break recep-  
tion and 12-bit Break character transmit. These make it  
ideally suited for use in Local Interconnect Network  
(LIN/J2602) bus systems.  
The EUSART can be configured in the following  
modes:  
• Asynchronous (full duplex) with:  
- Auto-wake-up on character reception  
- Auto-baud calibration  
- 12-bit Break character transmission  
• Synchronous – Master (half duplex) with  
selectable clock polarity  
• Synchronous – Slave (half duplex) with selectable  
clock polarity  
© 2009 Microchip Technology Inc.  
DS39682E-page 193  
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