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PIC18F25J10-I/SS 参数 Datasheet PDF下载

PIC18F25J10-I/SS图片预览
型号: PIC18F25J10-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能, RISC微控制器 [28/40/44-Pin High-Performance, RISC Microcontrollers]
分类和应用: 微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 368 页 / 5652 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F45J10 FAMILY  
If SDAx is low, a bus collision has occurred (i.e., another  
master is attempting to transmit a data ‘0’, see  
Figure 16-29). If SDAx is sampled high, the BRG is  
reloaded and begins counting. If SDAx goes from  
high-to-low before the BRG times out, no bus collision  
occurs because no two masters can assert SDAx at  
exactly the same time.  
16.4.17.2 Bus Collision During a Repeated  
Start Condition  
During a Repeated Start condition, a bus collision  
occurs if:  
a) A low level is sampled on SDAx when SCLx  
goes from low level to high level.  
b) SCLx goes low before SDAx is asserted low,  
indicating that another master is attempting to  
transmit a data ‘1’.  
If SCLx goes from high-to-low before the BRG times  
out and SDAx has not already been asserted, a bus  
collision occurs. In this case, another master is  
attempting to transmit a data ‘1’ during the Repeated  
Start condition (see Figure 16-30).  
When the user deasserts SDAx and the pin is allowed  
to float high, the BRG is loaded with SSPxADD<6:0>  
and counts down to 0. The SCLx pin is then deasserted  
and when sampled high, the SDAx pin is sampled.  
If, at the end of the BRG time-out, both SCLx and SDAx  
are still high, the SDAx pin is driven low and the BRG  
is reloaded and begins counting. At the end of the  
count, regardless of the status of the SCLx pin, the  
SCLx pin is driven low and the Repeated Start  
condition is complete.  
FIGURE 16-29:  
BUS COLLISION DURING A REPEATED START CONDITION (CASE 1)  
SDAx  
SCLx  
Sample SDAx when SCLx goes high.  
If SDAx = 0, set BCLxIF and release SDAx and SCLx.  
RSEN  
BCLxIF  
Cleared in software  
0’  
S
0’  
SSPxIF  
FIGURE 16-30:  
BUS COLLISION DURING REPEATED START CONDITION (CASE 2)  
TBRG  
TBRG  
SDAx  
SCLx  
SCLx goes low before SDAx,  
set BCLxIF. Release SDAx and SCLx.  
BCLxIF  
RSEN  
Interrupt cleared  
in software  
0’  
S
SSPxIF  
DS39682E-page 190  
© 2009 Microchip Technology Inc.  
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