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PIC18F25J10-I/SS 参数 Datasheet PDF下载

PIC18F25J10-I/SS图片预览
型号: PIC18F25J10-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能, RISC微控制器 [28/40/44-Pin High-Performance, RISC Microcontrollers]
分类和应用: 微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 368 页 / 5652 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F45J10 FAMILY  
REGISTER 17-3: BAUDCON: BAUD RATE CONTROL REGISTER 1  
R/W-0  
R-1  
U-0  
R/W-0  
SCKP  
R/W-0  
U-0  
R/W-0  
WUE  
R/W-0  
ABDOVF  
RCIDL  
BRG16  
ABDEN  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7  
bit 6  
ABDOVF: Auto-Baud Acquisition Rollover Status bit  
1= A BRG rollover has occurred during Auto-Baud Rate Detect mode (must be cleared in software)  
0= No BRG rollover has occurred  
RCIDL: Receive Operation Idle Status bit  
1= Receive operation is Idle  
0= Receive operation is active  
bit 5  
bit 4  
Unimplemented: Read as ‘0’  
SCKP: Synchronous Clock Polarity Select bit  
Asynchronous mode:  
Unused in this mode.  
Synchronous mode:  
1= Idle state for clock (CK) is a high level  
0= Idle state for clock (CK) is a low level  
bit 3  
BRG16: 16-Bit Baud Rate Register Enable bit  
1= 16-bit Baud Rate Generator – SPBRGH and SPBRG  
0= 8-bit Baud Rate Generator – SPBRG only (Compatible mode), SPBRGH value ignored  
bit 2  
bit 1  
Unimplemented: Read as ‘0’  
WUE: Wake-up Enable bit  
Asynchronous mode:  
1= EUSART will continue to sample the RX pin – interrupt generated on falling edge; bit cleared in  
hardware on following rising edge  
0= RX pin not monitored or rising edge detected  
Synchronous mode:  
Unused in this mode.  
bit 0  
ABDEN: Auto-Baud Detect Enable bit  
Asynchronous mode:  
1= Enable baud rate measurement on the next character. Requires reception of a Sync field (55h);  
cleared in hardware upon completion.  
0= Baud rate measurement disabled or completed  
Synchronous mode:  
Unused in this mode.  
DS39682E-page 196  
© 2009 Microchip Technology Inc.  
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