PIC18CXX2
SLEEP
Subtract f from WREG with
borrow
Enter SLEEP mode
SUBFWB
Syntax:
Syntax:
[ label ]
SLEEP
[ label ]
SUBFWB f,d,a
Operands:
Operation:
None
Operands:
0 ≤ f ≤ 255
00h → WDT,
0 → WDT postscaler,
1 → TO,
d
a
[0,1]
[0,1]
Operation:
(WREG) – (f) – (C) → dest
0 → PD
Status Affected:
Encoding:
N,OV, C, DC, Z
Status Affected:
Encoding:
TO, PD
0101
01da
ffff
ffff
0000
0000
0000
0011
Description:
Subtract register 'f' and carry flag
(borrow) from WREG (2’s comple-
ment method). If 'd' is 0, the result
Description:
The power-down status bit (PD) is
cleared. The time-out status bit
(TO) is set. Watchdog Timer and
its postscaler are cleared.
is stored in WREG. If 'd' is 1, the
result is stored in register 'f'
(default) . If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ is 1, then the
bank will be selected as per the
BSR value (default).
The processor is put into SLEEP
mode with the oscillator stopped.
Words:
Cycles:
1
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Words:
Cycles:
1
1
Decode
No
operation
Process
Data
Go to
sleep
Q Cycle Activity:
Q1
Q2
Q3
Q4
SLEEP
Example:
Decode
Read
register ’f’
Process
Data
Write to
destination
Before Instruction
TO
=
=
?
?
PD
After Instruction
TO
PD
=
=
1 †
0
† If WDT causes wake-up, this bit is cleared
DS39026B-page 226
Preliminary
7/99 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
