PIC18CXX2
RRNCF
Syntax:
Rotate Right f (no carry)
[ label ] RRNCF f,d,a
0 ≤ f ≤ 255
SETF
Set f
Syntax:
Operands:
[label] SETF f,a
Operands:
0 ≤ f ≤ 255
d
a
[0,1]
[0,1]
a
[0,1]
Operation:
FFh → f
None
Operation:
(f<n>) → dest<n-1>,
(f<0>) → dest<7>
Status Affected:
Encoding:
0110
100a
ffff
ffff
Status Affected:
Encoding:
N,Z
Description:
The contents of the specified regis-
ter are set to FFh. If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ is 1,
then the bank will be selected as
per the BSR value (default).
0100
00da
ffff
ffff
Description:
The contents of register ’f’ are
rotated one bit to the right. If ’d’ is 0,
the result is placed in WREG. If ’d’
is 1, the result is placed back in
register 'f' (default). If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ is 1,
then the bank will be selected as
per the BSR value (default).
Words:
Cycles:
1
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ’f’
Process
Data
Write
register ’f’
register f
Words:
Cycles:
1
1
SETF
=
REG,1
Example:
Before Instruction
Q Cycle Activity:
Q1
REG
0x5A
0xFF
Q2
Q3
Q4
After Instruction
Decode
Read
register ’f’
Process
Data
Write to
destination
REG
=
RRNCF
REG, 1, 0
Example 1:
Before Instruction
REG
=
1101 0111
1110 1011
RRNCF REG, 0, 0
After Instruction
REG
=
Example 2:
Before Instruction
WREG
REG
=
=
?
1101 0111
After Instruction
WREG
REG
=
=
1110 1011
1101 0111
7/99 Microchip Technology Inc.
Preliminary
DS39026B-page 225
MICROCHIP [ MICROCHIP ]
