PIC18CXX2
RETURN
Syntax:
Return from Subroutine
RLCF
Rotate Left f through Carry
[ label ] RLCF f,d,a
0 ≤ f ≤ 255
[ label ] RETURN s
Syntax:
Operands:
Operands:
Operation:
s
[0,1]
d
a
[0,1]
[0,1]
(TOS) → PC,
if s = 1
(WS) → WREG,
(STATUSS) → STATUS,
(BSRS) → BSR,
Operation:
(f<n>) → dest<n+1>,
(f<7>) → C,
(C) → dest<0>
PCLATU, PCLATH are unchanged
Status Affected:
Encoding:
C,N,Z
Status Affected:
Encoding:
None
0011
01da
ffff
ffff
0000
0000
0001
001s
Description:
The contents of register 'f' are
rotated one bit to the left through
the Carry Flag. If 'd' is 0 the result is
Description:
Return from subroutine. The
stack is popped and the top of the
stack (TOS) is loaded into the
program counter. If ’s’ = 1, the
contents of the shadow registers
WS, STATUSS and BSRS are
loaded into their corresponding
registers, WREG, STATUS and
BSR. If ’s’ = 0, no update of
these registers occurs (default).
placed in WREG. If 'd' is 1 the
result is stored back in register 'f'
(default). If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ = 1, then the
bank will be selected as per the
BSR value (default).
register f
C
Words:
Cycles:
1
2
Words:
Cycles:
1
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Q Cycle Activity:
Q1
Decode
No
operation
Process
Data
pop PC from
stack
Q2
Q3
Q4
Decode
Read
Process
Data
Write to
destination
No
operation
No
operation
No
operation
No
operation
register ’f’
RLCF
REG, 0, 0
Example:
Before Instruction
RETURN
Example:
REG
=
=
1110 0110
0
C
After Interrupt
PC = TOS
After Instruction
REG
=
1110 0110
WREG
C
=
=
1100 1100
1
7/99 Microchip Technology Inc.
Preliminary
DS39026B-page 223
MICROCHIP [ MICROCHIP ]
