PIC18CXX2
LFSR
Load FSR
MOVF
Move f
Syntax:
Operands:
[ label ] LFSR f,k
Syntax:
Operands:
[ label ] MOVF f,d,a
0 ≤ f ≤ 2
0 ≤ f ≤ 255
0 ≤ k ≤ 4095
d
a
[0,1]
[0,1]
Operation:
k → FSRf
Operation:
f → dest
N,Z
Status Affected:
Encoding:
None
Status Affected:
Encoding:
1110
1111
1110
0000
00ff
k kkk
11
kkkk
k kkk
0101
00da
ffff
ffff
7
Description:
The 12-bit literal ’k’ is loaded into
the file select register pointed to
by ’f’
Description:
The contents of register ’f’ is moved
to a destination dependent upon
the status of ’d’. If 'd' is 0, the result
Words:
Cycles:
2
2
is placed in WREG. If 'd' is 1, the
result is placed back in register 'f'
(default). Location 'f' can be any-
where in the 256 byte bank. If ’a’ is
0, the Access Bank will be
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read literal
’k’ MSB
Process
Data
Write
literal ’k’
MSB to
FSRfH
selected, overriding the BSR value.
If ’a’ = 1, then the bank will be
selected as per the BSR value
(default).
Decode
Read literal
’k’ LSB
Process
Data
Write literal
’k’ to FSRfL
Words:
Cycles:
1
1
LFSR 2, 0x3AB
Example:
Q Cycle Activity:
Q1
Q2
Q3
Q4
After Instruction
FSR2H
FSR2L
=
=
0x03
0xAB
Decode
Read
register ’f’
Process
Data
Write
WREG
MOVF
REG, 0, 0
Example:
Before Instruction
REG
WREG
=
=
0x22
0xFF
After Instruction
REG
WREG
=
=
0x22
0x22
7/99 Microchip Technology Inc.
Preliminary
DS39026B-page 215
MICROCHIP [ MICROCHIP ]
