PIC18CXX2
INCFSZ
Syntax:
Increment f, skip if 0
[ label ] INCFSZ f,d,a
0 ≤ f ≤ 255
INFSNZ
Syntax:
Increment f, skip if not 0
[label] INFSNZ f,d,a
0 ≤ f ≤ 255
Operands:
Operands:
d
a
[0,1]
[0,1]
d
a
[0,1]
[0,1]
Operation:
(f) + 1 → dest,
skip if result = 0
Operation:
(f) + 1 → dest,
skip if result ≠ 0
Status Affected:
Encoding:
None
Status Affected:
Encoding:
None
0011
11da
ffff
ffff
0100
10da
ffff
ffff
Description:
The contents of register ’f’ are
Description:
The contents of register 'f' are
incremented. If ’d’ is 0, the result is
incremented. If 'd' is 0, the result is
placed in WREG. If ’d’ is 1, the
result is placed back in register ’f’.
(default)
placed in WREG. If 'd' is 1, the
result is placed back in register 'f'
(default).
If the result is 0, the next instruc-
tion, which is already fetched, is
discarded, and a NOPis executed
instead making it a two-cycle
instruction. If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ = 1, then the
bank will be selected as per the
BSR value (default).
If the result is not 0, the next
instruction, which is already
fetched, is discarded, and a NOPis
executed instead making it a two-
cycle instruction. If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ = 1,
then the bank will be selected as
per the BSR value (default).
Words:
Cycles:
1
Words:
Cycles:
1
1(2)
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction
Note: 3 cycles if skip and followed
by a 2-word instruction
Q Cycle Activity:
Q1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Q2
Q3
Q4
Decode
Read
register ’f’
Process
Data
Write to
destination
Decode
Read
register ’f’
Process
Data
Write to
destination
If skip:
Q1
If skip:
Q1
Q2
Q3
Q4
Q2
Q3
Q4
No
No
No
No
No
No
No
No
operation
operation
operation
operation
operation
operation
operation
operation
If skip and followed by 2-word instruction:
If skip and followed by 2-word instruction:
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
No
No
No
No
No
No
No
No
operation
operation
operation
operation
operation
operation
operation
operation
No
No
No
No
No
No
No
No
operation
operation
operation
operation
operation
operation
operation
operation
HERE
NZERO
ZERO
INCFSZ
:
:
CNT, 1, 0
HERE
ZERO
NZERO
INFSNZ REG, 1, 0
Example:
Example:
Before Instruction
Before Instruction
PC
=
Address (HERE)
PC
=
Address (HERE)
After Instruction
After Instruction
CNT
=
=
=
≠
=
CNT + 1
REG
=
≠
=
=
=
REG + 1
0;
Address (NZERO)
0;
Address (ZERO)
If CNT
PC
0;
If REG
PC
If REG
PC
Address(ZERO)
0;
Address(NZERO)
If CNT
PC
7/99 Microchip Technology Inc.
Preliminary
DS39026B-page 213
MICROCHIP [ MICROCHIP ]
