PIC18CXX2
BZ
Branch if Zero
[ label ] BZ
CALL
Subroutine Call
[ label ] CALL k,s
0 ≤ k ≤ 1048575
Syntax:
Operands:
Operation:
n
Syntax:
Operands:
-128 ≤ n ≤ 127
s
[0,1]
if Zero bit is ’1’
(PC) + 2 + 2n → PC
Operation:
(PC) + 4 → TOS,
k → PC<20:1>,
if s = 1
(WREG) → WS,
(STATUS) → STATUSS,
(BSR) → BSRS
Status Affected:
Encoding:
None
1110
0000
nnnn
nnnn
Description:
If the Zero bit is ’1’, then the pro-
gram will branch.
The 2’s complement number ’2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
Status Affected:
None
Encoding:
1st word (k<7:0>)
2nd word(k<19:8>)
1110
1111
110s
k kkk
kkkk
kkkk
7
0
8
k
kkk kkkk
19
Description:
Subroutine call of entire 2M byte
memory range. First, return
address (PC+ 4) is pushed onto the
return stack. If ’s’ = 1, the W, STA-
TUS and BSR registers are also
pushed into their respective
Words:
Cycles:
1
1(2)
Q Cycle Activity:
If Jump:
shadow registers, WS, STATUSS
and BSRS. If 's' = 0, no update
occurs (default). Then the 20-bit
value ’k’ is loaded into PC<20:1>.
CALLis a two-cycle instruction.
Q1
Q2
Q3
Q4
Decode
Read literal
’n’
Process
Data
Write to PC
No
operation
No
operation
No
operation
No
operation
Words:
Cycles:
2
2
If No Jump:
Q1
Q2
Q3
Q4
Decode
Read literal
’n’
Process
Data
No
operation
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read literal Push PC to Read literal
HERE
BZ Jump
Example:
’k’<7:0>,
stack
’k’<19:8>,
Write to PC
Before Instruction
No
operation
No
operation
No
operation
No
operation
PC
=
address (HERE)
After Instruction
If Zero
=
=
=
=
1;
PC
address (Jump)
0;
HERE
CALL THERE,1
Example:
If Zero
PC
address (HERE+2)
Before Instruction
PC
=
Address(HERE)
After Instruction
PC
TOS =
WS
BSRS=
=
Address(THERE)
Address (HERE + 4)
=
WREG
BSR
STATUSS = STATUS
DS39026B-page 206
Preliminary
7/99 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
