PIC18CXX2
TABLE 14-2: REGISTERS ASSOCIATED WITH SPI OPERATION
Value on Value on
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
POR,
BOR
all other
resets
0000 000x 0000 000u
INTCON
GIE/
GIEH
PEIE/ TMR0IE INT0IE
GIEL
RBIE
TMR0IF INT0IF
RBIF
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
--11 1111 --11 1111
0000 0000 0000 0000
PIR1
PIE1
PSPIF (1) ADIF
PSPIE(1) ADIE
PSPIP(1) ADIP
RCIF
RCIE
RCIP
TXIF
TXIE
TXIP
SSPIF
SSPIE
SSPIP
CCP1IF TMR2IF TMR1IF
CCP1IE TMR2IE TMR1IE
CCP1IP TMR2IP TMR1IP
IPR1
TRISC
PORTC Data Direction Register
SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register
SSPCON
TRISA
WCOL SSPOV SSPEN
CKP
PORTA Data Direction Register
CKE D/A
SSPM3 SSPM2 SSPM1 SSPM0
—
SSPSTAT
SMP
P
S
R/W
UA
BF
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'.
Shaded cells are not used by the MSSP in SPI mode.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18C2X2 devices. Always maintain these bits clear.
14.3
MSSP I2C Operation
FIGURE 14-7: MSSP BLOCK DIAGRAM
(I2C MODE)
The MSSP module in I2C mode fully implements all
master and slave functions (including general call sup-
port) and provides interrupts on start and stop bits in
hardware to determine a free bus (multi-master func-
tion). The MSSP module implements the standard
mode specifications, as well as 7-bit and 10-bit
addressing.
Internal
Data Bus
Read
Write
SSPBUF reg
SSPSR reg
RC3/SCK/SCL
Two pins are used for data transfer. These are the RC3/
SCK/SCL pin, which is the clock (SCL), and the RC4/
SDI/SDA pin, which is the data (SDA). The user must
configure these pins as inputs or outputs through the
TRISC<4:3> bits.
Shift
Clock
RC4/
SDI/
MSb
LSb
The MSSP module functions are enabled by setting
MSSP Enable bit SSPEN (SSPCON<5>).
SDA
Addr Match
Match detect
SSPADD reg
Set, Reset
S, P bits
(SSPSTAT reg)
Start and
Stop bit detect
The MSSP module has six registers for I2C operation.
These are the:
• MSSP Control Register1 (SSPCON1)
• MSSP Control Register2 (SSPCON2)
• MSSP Status Register (SSPSTAT)
• Serial Receive/Transmit Buffer (SSPBUF)
• MSSP Shift Register (SSPSR) - Not directly
accessible
• MSSP Address Register (SSPADD)
DS39026B-page 128
Preliminary
7/99 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
