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PIC18F8621-I/PT 参数 Datasheet PDF下载

PIC18F8621-I/PT图片预览
型号: PIC18F8621-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚高性能, 64 KB的增强型闪存微控制器与A / D [64/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with A/D]
分类和应用: 闪存微控制器和处理器外围集成电路装置时钟
文件页数/大小: 396 页 / 6639 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F6525/6621/8525/8621  
It is recommended that only BCF, BSF, SWAPF, MOVFF  
4.13 STATUS Register  
and MOVWFinstructions are used to alter the STATUS  
register, because these instructions do not affect the Z,  
C, DC, OV or N bits in the STATUS register.  
The STATUS register, shown in Register 4-3, contains  
the arithmetic status of the ALU. As with any other SFR,  
it can be the operand for any instruction.  
For other instructions that do not affect Status bits, see  
the instruction set summaries in Table 25-2.  
If the STATUS register is the destination for an instruc-  
tion that affects the Z, DC, C, OV or N bits, the results of  
the instruction are not written; instead, the status is  
updated according to the instruction performed. There-  
fore, the result of an instruction with the STATUS register  
as its destination may be different than intended. As an  
example, CLRFSTATUSwill set the Z bit and leave the  
remaining Status bits unchanged (‘000u u1uu’).  
Note:  
The C and DC bits operate as the borrow  
and digit borrow bits respectively in  
subtraction.  
REGISTER 4-3:  
STATUS REGISTER  
U-0  
U-0  
U-0  
R/W-x  
R/W-x  
OV  
R/W-x  
Z
R/W-x  
DC  
R/W-x  
C
N
bit 7  
bit 0  
bit 7-5  
bit 4  
Unimplemented: Read as ‘0’  
N: Negative bit  
This bit is used for signed arithmetic (2’s complement). It indicates whether the result was  
negative (ALU MSB = 1).  
1= Result was negative  
0= Result was positive  
bit 3  
OV: Overflow bit  
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the  
7-bit magnitude which causes the sign bit (bit 7) to change state.  
1= Overflow occurred for signed arithmetic (in this arithmetic operation)  
0= No overflow occurred  
bit 2  
bit 1  
Z: Zero bit  
1= The result of an arithmetic or logic operation is zero  
0= The result of an arithmetic or logic operation is not zero  
DC: Digit Carry/Borrow bit  
For ADDWF, ADDLW, SUBLWand SUBWFinstructions:  
1= A carry-out from the 4th low-order bit of the result occurred  
0= No carry-out from the 4th low-order bit of the result  
Note:  
For borrow, the polarity is reversed. A subtraction is executed by adding the  
2’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit  
is loaded with either bit 4 or bit 3 of the source register.  
bit 0  
C: Carry/Borrow bit  
For ADDWF, ADDLW, SUBLWand SUBWFinstructions:  
1= A carry-out from the Most Significant bit of the result occurred  
0= No carry-out from the Most Significant bit of the result occurred  
Note:  
For borrow, the polarity is reversed. A subtraction is executed by adding the  
2’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit  
is loaded with either the high- or low-order bit of the source register.  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
DS39612B-page 58  
2005 Microchip Technology Inc.  
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