PIC18F6525/6621/8525/8621
TABLE 3-3:
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
MCLR Resets
Power-on Reset,
Brown-out Reset
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
Register
Applicable Devices
PORTG(7)
PORTF
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
PIC18F6X2X PIC18F8X2X
--xx xxxx
x000 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
-x0x 0000(5)
0000 0000
-1-0 0-00
0000 0000
-1-0 0-00
0000 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
0000 0000
0000 0000
0000 0010
0000 000x
0000 0000
0000 0000
0000 0000
0000 0000
--uu uuuu
u000 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-u0u 0000(5)
0000 0000
-1-0 0-00
0000 0000
-1-0 0-00
0000 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
0000 0000
0000 0000
0000 0010
0000 000x
0000 0000
0000 0000
0000 0000
0000 0000
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu(5)
uuuu uuuu
-u-u u-uu
uuuu uuuu
-u-1 u-uu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
PORTE
PORTD
PORTC
PORTB
PORTA(5,6)
SPBRGH1
BAUDCON1
SPBRGH2
BAUDCON2
ECCP1DEL
TMR4
PR4
T4CON
CCPR4H
CCPR4L
CCP4CON
CCPR5H
CCPR5L
CCP5CON
SPBRG2
RCREG2
TXREG2
TXSTA2
RCSTA2
ECCP3AS
ECCP3DEL
ECCP2AS
ECCP2DEL
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ‘0’, q= value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 3-2 for Reset value for specific condition.
5: Bit 6 of PORTA, LATA and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other
oscillator modes, they are disabled and read ‘0’.
6: Bit 6 of PORTA, LATA and TRISA are not available on all devices. When unimplemented, they are read ‘0’.
7: If MCLR function is disabled, PORTG<5> is a read-only bit.
8: Enabled only in Microcontroller mode for PIC18F8525/8621 devices.
9: The MEMCON register is unimplemented and reads all ‘0’s when the device is in Microcontroller mode.
DS39612B-page 36
2005 Microchip Technology Inc.