PIC18F2331/2431/4331/4431
Run Modes..................................................................40
PRI_RUN ............................................................40
RC_RUN.............................................................41
SEC_RUN...........................................................40
Selecting .....................................................................39
Sleep Mode.................................................................43
Summary (table) .........................................................39
Power-on Reset (POR) ............................................... 49, 263
Power-up Delays.................................................................37
Power-up Timer (PWRT).............................................37, 263
Prescaler, Timer0..............................................................129
Assignment (PSA Bit) ...............................................129
Rate Select (T0PS2:T0PS0 Bits) ..............................129
Prescaler, Timer2..............................................................150
PRI_IDLE Mode ..................................................................44
PRI_RUN Mode ..................................................................40
Program Counter (PC) ........................................................62
Program Memory
PWM (CCP Module)
Associated Registers................................................ 150
CCPR1H:CCPR1L Registers.................................... 149
Duty Cycle ................................................................ 149
Example Frequencies/Resolutions ........................... 150
Period ....................................................................... 149
PR2 Register, Writing ............................................... 149
Setup for PWM Operation......................................... 150
TMR2 to PR2 Match ......................................... 136, 149
PWM Period...................................................................... 185
Q
Q Clock............................................................................. 150
QEI
and IC Shared Interrupts .......................................... 170
Configuration ............................................................ 162
Direction of Rotation ................................................. 163
Interrupts .................................................................. 164
Operation.................................................................. 163
Operation in Sleep Mode.......................................... 170
3x Input Capture............................................... 170
Sampling Modes....................................................... 163
Velocity Measurement .............................................. 167
Quadrature Encoder Interface (QEI)................................. 161
Instructions..................................................................66
Two-Word ...........................................................66
Interrupt Vector ...........................................................61
Map and Stack
PIC18F2331/4331...............................................61
PIC18F2431/4431...............................................61
Reset Vector ...............................................................61
Program Verification..........................................................279
Pulse-Width Modulation. See PWM (CCP Module).
PUSH ................................................................................312
PUSH and POP Instructions ...............................................64
PWM
R
R/W Bit...................................................... 206, 213, 214, 215
RAM. See Data Memory.
RC Oscillator....................................................................... 31
RCIO Oscillator Mode................................................. 31
RC_IDLE Mode................................................................... 45
RC_RUN Mode................................................................... 41
RCALL .............................................................................. 313
RCSTA Register
SPEN Bit................................................................... 217
Reader Response............................................................. 388
Registers
Associated Registers ................................................203
Complementary Operation........................................190
Control Registers ......................................................176
Dead-Time Generators .............................................191
Duty Cycle.................................................................187
Center-Aligned..................................................189
Comparison.......................................................187
Edge-Aligned ....................................................188
Register Buffers ................................................188
Registers...........................................................187
Fault Inputs ...............................................................199
Functionality..............................................................176
Modes
Continuous Up/Down Count .............................180
Free-Running....................................................180
Single-Shot .......................................................180
Output and Polarity Control.......................................198
Output Override ........................................................194
Single-Pulse Operation .............................................194
Special Event Trigger................................................202
Time Base.................................................................176
Interrupts...........................................................181
Continuous Up/Down
ADCHS (A/D Channel Select) .................................. 244
ADCON0 (A/D Control 0).......................................... 240
ADCON1 (A/D Control 1).......................................... 241
ADCON2 (A/D Control 2).......................................... 242
ADCON3 (A/D Control 3).......................................... 243
ANSEL0 (Analog Select 0) ....................................... 245
ANSEL1 (Analog Select 1) ....................................... 245
BAUDCON (Baud Rate Control)............................... 220
CAPxCON (Input Capture x Control)........................ 155
CCPxCON (CCPx Control)....................................... 145
CONFIG1H (Configuration 1 High)........................... 264
CONFIG2H (Configuration 2 High)........................... 266
CONFIG2L (Configuration 2 Low) ............................ 265
CONFIG3H (Configuration 3 High)........................... 268
CONFIG3L (Configuration 3 Low) ............................ 267
CONFIG4L (Configuration 4 Low) ............................ 269
CONFIG5H (Configuration 5 High)........................... 270
CONFIG5L (Configuration 5 Low) ............................ 270
CONFIG6H (Configuration 6 High)........................... 271
CONFIG6L (Configuration 6 Low) ............................ 271
CONFIG7H (Configuration 7 High)........................... 272
CONFIG7L (Configuration 7 Low) ............................ 272
DEVID1 (Device ID 1)............................................... 273
Count Mode ......................................182
Double Update Mode................................184
Free-Running Mode..................................181
Single-Shot Mode .....................................182
Postscaler .........................................................181
Prescaler...........................................................180
Update Lockout.........................................................202
DS39616D-page 384
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MICROCHIP [ MICROCHIP ]
