PIC18F2331/2431/4331/4431
CCP2 ........................................................................145
D
CCPR2H Register.............................................145
D/A Bit............................................................................... 206
CCPR2L Register .............................................145
Compare Mode. See Compare.
Data Addressing Modes ..................................................... 75
Direct .......................................................................... 75
Indirect........................................................................ 75
Inherent and Literal..................................................... 75
Data EEPROM Memory...................................................... 79
Associated Registers.................................................. 83
EEADR Register......................................................... 79
EECON1 and EECON2 Registers.............................. 79
Operation During Code-Protect .................................. 82
Protection Against Spurious Write.............................. 81
Reading ...................................................................... 81
Using .......................................................................... 82
Write Verify................................................................. 81
Writing ........................................................................ 81
Data Memory ...................................................................... 67
Access Bank............................................................... 68
Bank Select Register (BSR) ....................................... 68
General Purpose Register (GPR) File ........................ 68
Map for PIC18F2331/2431/4331/4431 ....................... 67
Special Function Registers (SFRs)............................. 69
DAW ................................................................................. 302
DC Characteristics............................................................ 339
Power-Down and Supply Current ............................. 332
Supply Voltage ......................................................... 331
DCFSNZ ........................................................................... 303
DECF................................................................................ 302
DECFSZ ........................................................................... 303
Development Support....................................................... 325
Device Differences............................................................ 375
Device Overview................................................................. 11
Features (table) .......................................................... 13
New Core Features..................................................... 11
Other Special Features............................................... 12
Device Reset Timers
Timer Resources.......................................................145
CKE Bit..............................................................................206
CKP Bit..............................................................................207
Clock Sources.....................................................................34
Effects of Power-Managed Modes..............................37
Selection Using OSCCON Register............................34
Clocking Scheme/Instruction Cycle.....................................65
CLRF.................................................................................299
CLRWDT...........................................................................299
Code Examples
Changing Between Capture Prescalers....................146
Computed GOTO Using an Offset Value....................64
Data EEPROM Read ..................................................81
Data EEPROM Refresh Routine.................................82
Data EEPROM Write ..................................................81
Erasing a Flash Program Memory Row ......................90
Fast Register Stack.....................................................64
How to Clear RAM (Bank 1) Using
Indirect Addressing .............................................75
Implementing a Real-Time Clock Using a
Timer1 Interrupt Service ...................................135
Initializing PORTA.....................................................113
Initializing PORTB.....................................................116
Initializing PORTC.....................................................119
Initializing PORTD.....................................................122
Initializing PORTE.....................................................124
Reading a Flash Program Memory Word ...................89
Saving STATUS, WREG and BSR
Registers in RAM..............................................112
Writing to Flash Program Memory ........................93–94
16 x 16 Signed Multiply Routine .................................96
16 x 16 Unsigned Multiply Routine .............................96
8 x 8 Signed Multiply Routine .....................................95
8 x 8 Unsigned Multiply Routine .................................95
Code Protection ........................................................ 263, 279
Associated Registers ................................................279
Data EEPROM..........................................................282
Program Memory ......................................................280
COMF................................................................................300
Compare (CCP Module)....................................................147
Associated Registers ................................................148
CCP Pin Configuration..............................................147
CCPR1 Register .......................................................147
CCPR2 Register .......................................................147
Software Interrupt Mode ...........................................147
Special Event Trigger................................................147
Timer1 Mode Selection .............................................147
Configuration Bits..............................................................263
Configuration Register Protection .....................................282
Conversion Considerations...............................................376
CPFSEQ ...........................................................................300
CPFSGT............................................................................301
CPFSLT ............................................................................301
Crystal Oscillator/Ceramic Resonators ...............................29
Customer Change Notification Service .............................387
Customer Notification Service...........................................387
Customer Support.............................................................387
Oscillator Start-up Timer (OST).................................. 50
PLL Lock Time-out...................................................... 50
Power-up Timer (PWRT) ............................................ 50
Time-out Sequence .................................................... 50
Direct Addressing ............................................................... 76
E
Electrical Characteristics .................................................. 329
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) .............................. 217
Equations
A/D Acquisition Time ................................................ 249
Conversion Time for Multi-Channel Modes .............. 254
Minimum A/D Holding Capacitor Charging Time...... 249
PWM Period for Free-Running Mode ....................... 185
PWM Period for Up/Down Count Mode.................... 185
PWM Resolution....................................................... 185
16 x 16 Signed Multiplication Algorithm...................... 96
16 x 16 Unsigned Multiplication Algorithm.................. 96
Errata.................................................................................... 9
DS39616D-page 380
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