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PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
EUSART  
Asynchronous Mode ................................................. 226  
H
Hardware Multiplier............................................................. 95  
Introduction................................................................. 95  
Operation.................................................................... 95  
Performance Comparison........................................... 95  
Associated Registers, Receive ......................... 230  
Associated Registers, Transmit ........................ 228  
Auto-Wake-up on Sync Break .......................... 231  
Receiver............................................................ 229  
Receiving a Break Character............................ 232  
Setting Up 9-Bit Mode with Address Detect...... 229  
Transmitter........................................................ 226  
12-Bit Break Character Sequence .................... 232  
I
I/O Ports ........................................................................... 113  
ID Locations.............................................................. 263, 282  
INCF ................................................................................. 304  
INCFSZ............................................................................. 305  
In-Circuit Debugger........................................................... 282  
In-Circuit Serial Programming (ICSP)....................... 263, 282  
Independent PWM Mode.................................................. 193  
Duty Cycle Assignment ............................................ 193  
Indirect Addressing............................................................. 76  
INFSNZ............................................................................. 305  
Initialization Conditions for All Registers....................... 54–59  
Instruction Flow/Pipelining.................................................. 65  
Instruction Set  
Baud Rate Generator (BRG)..................................... 221  
Associated Registers........................................ 222  
Auto-Baud Rate Detect..................................... 225  
Baud Rate Error, Calculating ............................ 222  
Baud Rates, Asynchronous Modes .................. 222  
High Baud Rate Select (BRGH Bit) .................. 221  
Power-Managed Mode Operation..................... 221  
Sampling........................................................... 221  
Serial Port Enable (SPEN Bit)................................... 217  
Synchronous Master Mode....................................... 233  
Associated Registers, Receive ......................... 236  
Associated Registers, Transmit ........................ 234  
Reception.......................................................... 235  
Transmission .................................................... 233  
Synchronous Slave Mode......................................... 237  
Associated Registers, Receive ......................... 238  
Associated Registers, Transmit ........................ 237  
Reception.......................................................... 238  
Transmission .................................................... 237  
External Clock Input............................................................ 31  
ADDLW..................................................................... 289  
ADDWF .................................................................... 289  
ADDWFC.................................................................. 290  
ANDLW..................................................................... 290  
ANDWF .................................................................... 291  
BC............................................................................. 291  
BCF .......................................................................... 292  
BN............................................................................. 292  
BNC.......................................................................... 293  
BNN.......................................................................... 293  
BNOV ....................................................................... 294  
BNZ .......................................................................... 294  
BOV.......................................................................... 297  
BRA .......................................................................... 295  
BSF........................................................................... 295  
BTFSC...................................................................... 296  
BTFSS...................................................................... 296  
BTG .......................................................................... 297  
BZ............................................................................. 298  
CALL......................................................................... 298  
CLRF ........................................................................ 299  
CLRWDT .................................................................. 299  
COMF....................................................................... 300  
CPFSEQ................................................................... 300  
CPFSGT................................................................... 301  
CPFSLT.................................................................... 301  
DAW ......................................................................... 302  
DCFSNZ................................................................... 303  
DECF........................................................................ 302  
DECFSZ ................................................................... 303  
General Format ........................................................ 285  
GOTO....................................................................... 304  
INCF ......................................................................... 304  
INCFSZ..................................................................... 305  
INFSNZ..................................................................... 305  
IORLW...................................................................... 306  
IORWF...................................................................... 306  
LFSR ........................................................................ 307  
MOVF ....................................................................... 307  
MOVFF..................................................................... 308  
MOVLB..................................................................... 308  
F
Fail-Safe Clock Monitor............................................. 263, 277  
Exiting ....................................................................... 277  
Interrupts in Power-Managed Modes........................ 278  
POR or Wake From Sleep ........................................ 278  
WDT During Oscillator Failure .................................. 277  
Fail-Safe Clock Monitor (FSCM)....................................... 263  
Fast Register Stack............................................................. 64  
Flash Program Memory ...................................................... 85  
Associated Registers .................................................. 94  
Control Registers ........................................................ 86  
EECON1 and EECON2 ...................................... 86  
Erase Sequence ......................................................... 90  
Erasing........................................................................ 90  
Operation During Code-Protect .................................. 94  
Reading....................................................................... 89  
TABLAT Register........................................................ 88  
Table Pointer............................................................... 88  
Boundaries Based on Operation......................... 88  
Table Pointer Boundaries ........................................... 88  
Table Reads and Table Writes ................................... 85  
Unexpected Termination of Write Operation............... 94  
Write Sequence .......................................................... 92  
Write Verify ................................................................. 94  
Writing......................................................................... 91  
FSCM. See Fail-Safe Clock Monitor.  
G
Getting Started.................................................................... 25  
GOTO ............................................................................... 304  
2010 Microchip Technology Inc.  
DS39616D-page 381