PIC18F2331/2431/4331/4431
FIGURE 26-6:
CLKO AND I/O TIMING
Q1
Q2
Q3
Q4
OSC1
11
10
CLKO
13
14
12
19
18
16
I/O Pin
(Input)
15
17
I/O Pin
(Output)
New Value
Old Value
20, 21
TABLE 26-7: CLKO AND I/O TIMING REQUIREMENTS
Param
Symbol
Characteristic
Min
Typ†
Max
Units Conditions
No.
10
TosH2ckL OSC1 to CLKO
TosH2ckH OSC1 to CLKO
—
—
—
—
—
75
75
35
35
—
—
—
50
—
—
200
200
100
100
ns (Note 1)
ns (Note 1)
ns (Note 1)
ns (Note 1)
11
12
13
14
15
16
17
18
18A
TckR
TckF
CLKO Rise Time
CLKO Fall Time
TckL2ioV CLKO to Port Out Valid
TioV2ckH Port In Valid before CLKO
TckH2ioI Port In Hold after CLKO
TosH2ioV OSC1 (Q1 cycle) to Port Out Valid
0.5 TCY + 20 ns (Note 1)
0.25 TCY + 25
—
—
ns (Note 1)
0
ns (Note 1)
—
150
—
ns
ns
ns
TosH2ioI OSC1 (Q2 cycle) to
Port Input Invalid
PIC18FXX31
PIC18LFXX31
100
200
—
(I/O in hold time)
19
TioV2osH Port Input Valid to OSC1 (I/O in setup
0
—
—
ns
time)
20
TioR
TioF
Port Output Rise Time
Port Output Fall Time
PIC18FXX31
PIC18LFXX31
PIC18FXX31
PIC18LFXX31
—
—
10
—
10
—
—
—
25
60
25
60
—
—
ns
ns
ns
ns
ns
ns
20A
21
—
21A
22†
23†
—
TINP
INTx Pin High or Low Time
TCY
TCY
TRBP
RB<7:4> Change INTx High or Low Time
†
These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in RC mode, where CLKO output is 4 x TOSC.
DS39616D-page 348
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
