PIC18F2331/2431/4331/4431
TABLE 26-5: PLL CLOCK TIMING SPECIFICATIONS (VDD = 4.2V TO 5.5V)
Param
No.
Sym
Characteristic
Min
Typ†
Max
Units Conditions
F10
F11
F12
F13
†
FOSC Oscillator Frequency Range
FSYS On-Chip VCO System Frequency
TPLL PLL Start-up Time (Lock Time)
CLK CLKO Stability (Jitter)
4
—
—
—
—
10
40
2
MHz HS mode only
16
—
-2
MHz HS mode only
ms
%
+2
Data in “Typ” column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only
and are not tested.
TABLE 26-6: INTERNAL RC ACCURACY
PIC18LF2331/2431/4331/4431
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C TA +85°C for industrial
(Industrial)
Standard Operating Conditions (unless otherwise stated)
PIC18F2331/2431/4331/4431
Operating temperature
-40°C TA +85°C for industrial
-40°C TA +125°C for extended
(Industrial)
Param
Device
No.
Min
Typ
Max
Units
Conditions
(1)
INTOSC Accuracy @ Freq = 8 MHz, 4 MHz, 2 MHz, 1 MHz, 500 kHz, 250 kHz, 125 kHz
F2
F3
PIC18LF2331/2431/4331/4431
All devices
-15
+/-5
+/-5
+15
+15
%
%
25°C
25°C
VDD = 3.0V
VDD = 5.0V
-15
(2)
INTRC Accuracy @ Freq = 31 kHz
F5
PIC18LF2331/2431/4331/4431 26.562
All devices 26.562
—
—
35.938
35.938
kHz
kHz
25°C
25°C
VDD = 3.0V
VDD = 5.0V
F6
Legend:
Shading of rows is to assist in readability of the table.
Note 1: Frequency calibrated at 25°C. OSCTUNE register can be used to compensate for temperature drift.
2: INTRC frequency after calibration.
2010 Microchip Technology Inc.
DS39616D-page 347
MICROCHIP [ MICROCHIP ]
