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PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
SLEEP  
Enter Sleep Mode  
SUBFWB  
Subtract f from W with Borrow  
Syntax:  
[ label ] SLEEP  
Syntax:  
[ label ] SUBFWB f [,d [,a]]  
Operands:  
Operation:  
None  
Operands:  
0 f 255  
d [0,1]  
a [0,1]  
00h WDT,  
0 WDT postscaler,  
1 TO,  
Operation:  
(W) – (f) – (C) dest  
0 PD  
Status Affected:  
Encoding:  
N, OV, C, DC, Z  
Status Affected:  
Encoding:  
TO, PD  
0101  
01da  
ffff  
ffff  
0000  
0000  
0000  
0011  
Description:  
Subtract register, ‘f’, and the Carry flag  
(borrow) from W (2’s complement  
method). If ‘d’ is ‘0’, the result is stored  
in W. If ‘d’ is ‘1’, the result is stored in  
register, ‘f’. If ‘a’ is ‘0’, the Access Bank  
will be selected, overriding the BSR  
value. If ‘a’ is ‘1’, then the bank will be  
selected as per the BSR value.  
Description:  
The Power-Down status bit (PD) is  
cleared. The Time-out status bit (TO)  
is set. Watchdog Timer and its post-  
scaler are cleared.  
The processor is put into Sleep mode  
with the oscillator stopped.  
Words:  
Cycles:  
1
1
Words:  
Cycles:  
1
1
Q Cycle Activity:  
Q1  
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
Q2  
Q3  
Q4  
Decode  
No  
operation  
Process  
Data  
Go to  
Sleep  
Decode  
Read  
register ‘f’  
Process  
Data  
Write to  
destination  
Example:  
SLEEP  
Example 1:  
SUBFWB REG  
Before Instruction  
Before Instruction  
TO  
PD  
=
=
?
?
REG  
W
C
=
=
=
0x03  
0x02  
0x01  
After Instruction  
After Instruction  
TO  
PD  
=
=
1 †  
0
REG  
W
C
Z
N
=
0xFF  
0x02  
0x00  
0x00  
=
=
=
=
If WDT causes wake-up, this bit is cleared.  
0x01 ; result is negative  
Example 2:  
Before Instruction  
SUBFWB  
REG, 0, 0  
REG  
W
C
=
=
=
2
5
1
After Instruction  
REG  
W
C
Z
N
=
2
3
1
0
0
=
=
=
=
; result is positive  
Example 3:  
SUBFWB  
REG, 1, 0  
Before Instruction  
REG  
W
C
=
=
=
1
2
0
After Instruction  
REG  
W
C
Z
N
=
0
2
1
1
0
=
=
=
=
; result is zero  
DS39616D-page 318  
2010 Microchip Technology Inc.  
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