PIC18F2331/2431/4331/4431
RLNCF
Rotate Left f (No Carry)
RRCF
Rotate Right f through Carry
Syntax:
[ label ]
RLNCF f [,d [,a]]
Syntax:
[ label ] RRCF f [,d [,a]]
Operands:
0 f 255
d [0,1]
a [0,1]
Operands:
0 f 255
d [0,1]
a [0,1]
Operation:
(f<n>) dest<n + 1>,
(f<7>) dest<0>
Operation:
(f<n>) dest<n – 1>,
(f<0>) C,
(C) dest<7>
Status Affected:
Encoding:
N, Z
Status Affected:
Encoding:
C, N, Z
0100
01da
ffff
ffff
0011
00da
ffff
ffff
Description:
The contents of register, ‘f’, are rotated
one bit to the left. If ‘d’ is ‘0’, the result is
placed in W. If ‘d’ is ‘1’, the result is
stored back in register, ‘f’. If ‘a’ is ‘0’, the
Access Bank will be selected, overrid-
ing the BSR value. If ‘a’ is ‘1’, then the
bank will be selected as per the BSR
value.
Description:
The contents of register, ‘f’, are rotated
one bit to the right through the Carry
Flag. If ‘d’ is ‘0’, the result is placed in
W. If ‘d’ is ‘1’, the result is placed back
in register, ‘f’. If ‘a’ is ‘0’, the Access
Bank will be selected, overriding the
BSR value. If ‘a’ is ‘1’, then the bank will
be selected as per the BSR value.
register f
register f
C
Words:
Cycles:
1
1
Words:
Cycles:
1
1
Q Cycle Activity:
Q1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write to
destination
Decode
Read
register ‘f’
Process
Data
Write to
destination
Example:
RLNCF
REG
Example:
RRCF
REG, W
Before Instruction
REG
After Instruction
=
1010 1011
0101 0111
Before Instruction
REG
C
=
=
1110 0110
0
REG
=
After Instruction
REG
W
C
=
=
=
1110 0110
0111 0011
0
DS39616D-page 316
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
