PIC18F2331/2431/4331/4431
RRNCF
Rotate Right f (No Carry)
SETF
Set f
Syntax:
[ label ] RRNCF f [,d [,a]]
Syntax:
[ label ] SETF f [,a]
Operands:
0 f 255
d [0,1]
a [0,1]
Operands:
0 f 255
a [0,1]
Operation:
FFh f
Operation:
(f<n>) dest<n – 1>,
(f<0>) dest<7>
Status Affected:
Encoding:
None
0110
100a
ffff
ffff
Status Affected:
Encoding:
N, Z
Description:
The contents of the specified register
are set to FFh. If ‘a’ is ‘0’, the Access
Bank will be selected, overriding the
BSR value. If ‘a’ is ‘1’, then the bank will
be selected as per the BSR value.
0100
00da
ffff
ffff
Description:
The contents of register, ‘f’, are rotated
one bit to the right. If ‘d’ is ‘0’, the result
is placed in W. If ‘d’ is ‘1’, the result is
placed back in register, ‘f’. If ‘a’ is ‘0’,
the Access Bank will be selected, over-
riding the BSR value. If ‘a’ is ‘1’, then
the bank will be selected as per the
BSR value.
Words:
Cycles:
1
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
register f
Decode
Read
register ‘f’
Process
Data
Write
register ‘f’
Words:
Cycles:
1
1
Example:
SETF
REG
Q Cycle Activity:
Q1
Before Instruction
REG
=
=
0x5A
0xFF
Q2
Q3
Q4
After Instruction
REG
Decode
Read
register ‘f’
Process
Data
Write to
destination
Example 1:
RRNCF
REG, 1, 0
Before Instruction
REG
After Instruction
REG
=
1101 0111
1110 1011
RRNCF REG, W
=
Example 2:
Before Instruction
W
REG
=
=
?
1101 0111
After Instruction
W
REG
=
=
1110 1011
1101 0111
2010 Microchip Technology Inc.
DS39616D-page 317
MICROCHIP [ MICROCHIP ]
