PIC18F2331/2431/4331/4431
FIGURE 20-11:
SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
RC7/RX/DT/SDO Pin
bit 0
bit 1
bit 2
bit 6
bit 7
RC6/TX/CK/SS Pin
Write to
TXREG Reg
TXIF bit
TRMT bit
TXEN bit
TABLE 20-7: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Reset Values
on Page:
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
PIR1
GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE
SSPIF
SSPIE
SSPIP
TMR0IF
INT0IF
RBIF
54
57
57
57
56
56
56
56
56
56
—
—
ADIF
ADIE
ADIP
RX9
RCIF
RCIE
RCIP
SREN
TXIF
TXIE
TXIP
CCP1IF TMR2IF TMR1IF
CCP1IE TMR2IE TMR1IE
CCP1IP TMR2IP TMR1IP
PIE1
IPR1
—
RCSTA
TXREG
TXSTA
BAUDCON
SPEN
CREN ADDEN
FERR
OERR
RX9D
EUSART Transmit Register
CSRC
—
TX9
TXEN
—
SYNC SENDB
SCKP BRG16
BRGH
—
TRMT
WUE
TX9D
RCIDL
ABDEN
SPBRGH EUSART Baud Rate Generator Register High Byte
SPBRG EUSART Baud Rate Generator Register Low Byte
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master transmission.
DS39616D-page 234
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
