PIC18F2331/2431/4331/4431
TABLE 20-8: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER RECEPTION
Reset Values
on Page:
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
PIR1
GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE
TMR0IF INT0IF
RBIF
54
57
57
57
56
56
56
56
56
56
—
—
ADIF
ADIE
ADIP
RX9
RCIF
RCIE
RCIP
SREN
TXIF
TXIE
TXIP
SSPIF CCP1IF TMR2IF TMR1IF
SSPIE CCP1IE TMR2IE TMR1IE
SSPIP CCP1IP TMR2IP TMR1IP
PIE1
IPR1
—
RCSTA
RCREG
TXSTA
BAUDCON
SPBRGH
SPBRG
SPEN
CREN ADDEN
FERR
OERR
RX9D
EUSART Receive Register
CSRC
—
TX9
TXEN
—
SYNC SENDB BRGH
SCKP BRG16
TRMT
WUE
TX9D
RCIDL
—
ABDEN
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master reception.
DS39616D-page 236
2010 Microchip Technology Inc.