PIC18F2331/2431/4331/4431
To set up an Asynchronous Transmission:
5. Enable the transmission by setting bit, TXEN,
which will also set bit, TXIF.
1. Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit, BRGH (see Section 20.2 “EUSART
Baud Rate Generator (BRG)”).
6. If 9-bit transmission is selected, the ninth bit
should be loaded in bit, TX9D.
7. Load data to the TXREG register (starts
transmission).
2. Enable the asynchronous serial port by clearing
bit, SYNC, and setting bit, SPEN.
If using interrupts, ensure that the GIE and PEIE bits in
the INTCON register (INTCON<7:6>) are set.
3. If interrupts are desired, set enable bit, TXIE.
4. If 9-bit transmission is desired, set transmit bit,
TX9. Can be used as address/data bit.
FIGURE 20-6:
ASYNCHRONOUS RECEPTION
Start
bit
Start
bit
Start
bit
Stop
bit
Stop
bit
Stop
bit
bit 0 bit 1
bit 7/8
bit 7/8
bit 7/8
RX (Pin)
bit 0
Rcv Shift
Reg
Rcv Buffer Reg
Word 2
RCREG
Word 1
RCREG
Read Rcv
Buffer Reg
RCREG
RCIF
(Interrupt Flag)
OERR bit
CREN
Note:
This timing diagram shows three words appearing on the RX input. The RCREG (Receive Buffer) is read after
the third word, causing the OERR (Overrun) bit to be set.
TABLE 20-6: REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
ResetValues
on Page:
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
PIR1
GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE
TMR0IF INT0IF
RBIF
54
57
57
57
56
56
56
56
56
56
—
—
ADIF
ADIE
ADIP
RX9
RCIF
RCIE
RCIP
SREN
TXIF
TXIE
TXIP
SSPIF CCP1IF TMR2IF TMR1IF
SSPIE CCP1IE TMR2IE TMR1IE
SSPIP CCP1IP TMR2IP TMR1IP
PIE1
IPR1
—
RCSTA
RCREG
TXSTA
BAUDCON
SPEN
CREN ADDEN FERR
OERR
RX9D
EUSART Receive Register
CSRC
—
TX9
TXEN
—
SYNC SENDB BRGH
TRMT
WUE
TX9D
RCIDL
SCKP
BRG16
—
ABDEN
SPBRGH EUSART Baud Rate Generator Register High Byte
SPBRG EUSART Baud Rate Generator Register Low Byte
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for asynchronous reception.
DS39616D-page 230
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
