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PIC18F4431-I/PT 参数 Datasheet PDF下载

PIC18F4431-I/PT图片预览
型号: PIC18F4431-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
5.1  
RCON Register  
Note 1: If the BOREN Configuration bit is set  
(Brown-out Reset enabled), the BOR bit  
is ‘1’ on a Power-on Reset. After a  
Brown-out Reset has occurred, the BOR  
bit will be cleared and must be set by  
firmware to indicate the occurrence of the  
next Brown-out Reset.  
Device Reset events are tracked through the RCON  
register (Register 5-1). The lower five bits of the register  
indicate that a specific Reset event has occurred. In most  
cases, these bits can only be cleared by the event and  
must be set by the application after the event. The state  
of these flag bits, taken together, can be read to indicate  
the type of Reset that just occurred. This is described in  
more detail in Section 5.6 “Reset State of Registers”.  
2: It is recommended that the POR bit be  
set after a Power-on Reset has been  
detected, so that subsequent Power-on  
Resets may be detected.  
The RCON register also has control bits for setting  
interrupt priority (IPEN) and software control of the  
BOR (SBOREN). Interrupt priority is discussed in  
Section 10.0 “Interrupts”. BOR is covered in  
Section 5.4 “Brown-out Reset (BOR)”.  
REGISTER 5-1:  
RCON: RESET CONTROL REGISTER  
R/W-0  
IPEN  
U-0  
U-0  
R/W-1  
RI  
R-1  
TO  
R-1  
PD  
R/W-0  
POR(2)  
R/W-0  
BOR(1)  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7  
IPEN: Interrupt Priority Enable bit  
1= Enable priority levels on interrupts  
0= Disable priority levels on interrupts (PIC16CXXX Compatibility mode)  
bit 6-5  
bit 4  
Unimplemented: Read as ‘0’  
RI: RESETInstruction Flag bit  
1= The RESETinstruction was not executed (set by firmware only)  
0= The RESET instruction was executed causing a device Reset (must be set in software after a  
Brown-out Reset occurs)  
bit 3  
bit 2  
bit 1  
bit 0  
TO: Watchdog Time-out Flag bit  
1= Set by power-up, CLRWDTinstruction or SLEEPinstruction  
0= A WDT time-out occurred  
PD: Power-Down Detection Flag bit  
1= Set by power-up or by the CLRWDTinstruction  
0= Set by execution of the SLEEPinstruction  
POR: Power-on Reset Status bit(2)  
1= A Power-on Reset has not occurred (set by firmware only)  
0= A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)  
BOR: Brown-out Reset Status bit(1)  
1= A Brown-out Reset has not occurred (set by firmware only)  
0= A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)  
Note 1: If SBOREN is enabled, its Reset state is ‘1’; otherwise, it is ‘0’.  
2: The actual Reset value of POR is determined by the type of device Reset. See the notes following this  
register and Section 5.6 “Reset State of Registers” for additional information.  
Note 1: It is recommended that the POR bit be set after a Power-on Reset has been detected so that subsequent  
Power-on Resets may be detected.  
2: Brown-out Reset is said to have occurred when BOR is ‘0’ and POR is ‘1’ (assuming that POR was set to  
1’ by software immediately after a Power-on Reset).  
DS39616D-page 48  
2010 Microchip Technology Inc.  
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