PIC18F2220/2320/4220/4320
TABLE 4-3:
INITIALIZATION CONDITIONS FOR ALL REGISTERS
MCLR Resets
Power-on Reset,
Brown-out Reset
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
Register
Applicable Devices
TOSU
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
---0 0000
0000 0000
0000 0000
uu-0 0000
---0 0000
0000 0000
0000 0000
--00 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 000x
1111 -1-1
11-0 0-00
N/A
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
--00 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 000u
1111 -1-1
11-0 0-00
N/A
---0 uuuu(3)
uuuu uuuu(3)
uuuu uuuu(3)
uu-u uuuu(3)
---u uuuu
uuuu uuuu
PC + 2(2)
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu(1)
uuuu -u-u(1)
uu-u u-uu(1)
N/A
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0
POSTINC0 2220 2320 4220 4320
POSTDEC0 2220 2320 4220 4320
N/A
N/A
N/A
N/A
N/A
N/A
PREINC0
PLUSW0
FSR0H
FSR0L
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
N/A
N/A
N/A
N/A
N/A
N/A
---- xxxx
xxxx xxxx
xxxx xxxx
N/A
---- uuuu
uuuu uuuu
uuuu uuuu
N/A
---- uuuu
uuuu uuuu
uuuu uuuu
N/A
WREG
INDF1
POSTINC1 2220 2320 4220 4320
POSTDEC1 2220 2320 4220 4320
N/A
N/A
N/A
N/A
N/A
N/A
PREINC1
PLUSW1
2220 2320 4220 4320
2220 2320 4220 4320
N/A
N/A
N/A
N/A
N/A
N/A
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ‘0’, q= value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 4-2 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
DS39599C-page 46
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
