欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F2320-I/SP的Datasheet PDF文件第44页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第45页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第46页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第47页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第49页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第50页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第51页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第52页  
PIC18F2220/2320/4220/4320  
TABLE 4-3:  
INITIALIZATION CONDITIONS FOR ALL REGISTERS  
MCLR Resets  
Power-on Reset,  
Brown-out Reset  
WDT Reset  
RESET Instruction  
Stack Resets  
Wake-up via WDT  
or Interrupt  
Register  
Applicable Devices  
TOSU  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
---0 0000  
0000 0000  
0000 0000  
uu-0 0000  
---0 0000  
0000 0000  
0000 0000  
--00 0000  
0000 0000  
0000 0000  
0000 0000  
xxxx xxxx  
xxxx xxxx  
0000 000x  
1111 -1-1  
11-0 0-00  
N/A  
---0 0000  
0000 0000  
0000 0000  
00-0 0000  
---0 0000  
0000 0000  
0000 0000  
--00 0000  
0000 0000  
0000 0000  
0000 0000  
uuuu uuuu  
uuuu uuuu  
0000 000u  
1111 -1-1  
11-0 0-00  
N/A  
---0 uuuu(3)  
uuuu uuuu(3)  
uuuu uuuu(3)  
uu-u uuuu(3)  
---u uuuu  
uuuu uuuu  
PC + 2(2)  
--uu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu(1)  
uuuu -u-u(1)  
uu-u u-uu(1)  
N/A  
TOSH  
TOSL  
STKPTR  
PCLATU  
PCLATH  
PCL  
TBLPTRU  
TBLPTRH  
TBLPTRL  
TABLAT  
PRODH  
PRODL  
INTCON  
INTCON2  
INTCON3  
INDF0  
POSTINC0 2220 2320 4220 4320  
POSTDEC0 2220 2320 4220 4320  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
PREINC0  
PLUSW0  
FSR0H  
FSR0L  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
2220 2320 4220 4320  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
---- xxxx  
xxxx xxxx  
xxxx xxxx  
N/A  
---- uuuu  
uuuu uuuu  
uuuu uuuu  
N/A  
---- uuuu  
uuuu uuuu  
uuuu uuuu  
N/A  
WREG  
INDF1  
POSTINC1 2220 2320 4220 4320  
POSTDEC1 2220 2320 4220 4320  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
PREINC1  
PLUSW1  
2220 2320 4220 4320  
2220 2320 4220 4320  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ‘0’, q= value depends on condition.  
Shaded cells indicate conditions do not apply for the designated device.  
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).  
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the  
interrupt vector (0008h or 0018h).  
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are  
updated with the current value of the PC. The STKPTR is modified to point to the next location in the  
hardware stack.  
4: See Table 4-2 for Reset value for specific condition.  
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When  
not enabled as PORTA pins, they are disabled and read ‘0’.  
DS39599C-page 46  
2003 Microchip Technology Inc.