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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
SUBWFB  
Syntax:  
Subtract W from f with Borrow  
SUBWFB REG, 1, 0  
Example 1:  
Before Instruction  
[ label ] SUBWFB f [,d [,a]]  
REG  
W
C
=
=
=
0x19  
0x0D  
0x01  
(0001 1001)  
(0000 1101)  
Operands:  
0 f 255  
d [0,1]  
a [0,1]  
After Instruction  
REG  
W
C
Z
N
=
=
=
=
=
0x0C  
0x0D  
(0000 1011)  
(0000 1101)  
Operation:  
(f) – (W) – (C) dest  
Status Affected: N, OV, C, DC, Z  
0x01  
0x00  
0x00  
Encoding:  
0101  
10da  
ffff  
ffff  
; result is positive  
Description:  
Subtract W and the carry flag (bor-  
row) from register ‘f’ (2’s complement  
method). If ‘d’ is ‘0’, the result is  
stored in W. If ‘d’ is ‘1’, the result is  
stored back in register ‘f’ (default). If  
‘a’ is ‘0’, the Access Bank will be  
selected, overriding the BSR value. If  
‘a’ is ‘1’, then the bank will be  
selected as per the BSR value  
(default).  
SUBWFB REG, 0, 0  
Example 2:  
Before Instruction  
REG  
W
C
=
=
=
0x1B  
0x1A  
0x00  
(0001 1011)  
(0001 1010)  
After Instruction  
REG  
W
C
Z
N
=
=
=
=
=
0x1B  
0x00  
(0001 1011)  
0x01  
0x01  
0x00  
; result is zero  
Words:  
Cycles:  
1
1
SUBWFB REG, 1, 0  
Example 3:  
Before Instruction  
Q Cycle Activity:  
Q1  
REG  
W
C
=
=
=
0x03  
0x0E  
0x01  
(0000 0011)  
(0000 1101)  
Q2  
Q3  
Q4  
Decode  
Read  
register ‘f’  
Process  
Data  
Write to  
destination  
After Instruction  
REG  
=
0xF5  
0x0E  
(1111 0100)  
; [2’s comp]  
(0000 1101)  
W
=
C
Z
N
=
=
=
0x00  
0x00  
0x01  
; result is negative  
DS39599C-page 292  
2003 Microchip Technology Inc.  
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