PIC18F2220/2320/4220/4320
SLEEP
Enter SLEEP mode
SUBFWB
Subtract f from W with borrow
Syntax:
[ label ] SLEEP
Syntax:
[ label ] SUBFWB f [,d [,a]]
Operands:
Operation:
None
Operands:
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
00h → WDT,
0 → WDT postscaler,
1 → TO,
Operation:
(W) – (f) – (C) → dest
0 → PD
Status Affected:
Encoding:
N, OV, C, DC, Z
Status Affected:
Encoding:
TO, PD
0101
01da
ffff
ffff
0000
0000
0000
0011
Description:
Subtract register ‘f’ and carry flag
(borrow) from W (2’s complement
method). If ‘d’ is ‘0’, the result is
stored in W. If ‘d’ is ‘1’, the result is
stored in register ‘d’ (default). If ‘a’
is ‘0’, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ is ‘1’, then the bank will be
selected as per the BSR value
(default).
Description:
The power-down status bit (PD) is
cleared. The time-out status bit
(TO) is set. Watchdog Timer and
its postscaler are cleared.
The processor is put into Sleep
mode with the oscillator stopped.
Words:
Cycles:
1
1
Q Cycle Activity:
Q1
Words:
Cycles:
1
1
Q2
Q3
Q4
Decode
No
operation
Process
Data
Go to
Sleep
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write to
destination
SLEEP
Example:
Before Instruction
SUBFWB REG
Example 1:
TO
PD
=
?
=
?
Before Instruction
After Instruction
REG
W
C
=
=
=
0x03
0x02
0x01
TO
PD
=
=
1 †
0
After Instruction
† If WDT causes wake-up, this bit is cleared.
REG
=
0xFF
0x02
W
=
C
Z
N
=
=
=
0x00
0x00
0x01 ; result is negative
SUBFWB
REG, 0, 0
Example 2:
Before Instruction
REG
=
2
W
C
=
=
5
1
After Instruction
REG
W
=
=
2
3
C
Z
N
=
=
=
1
0
0
; result is positive
SUBFWB
REG, 1, 0
Example 3:
Before Instruction
REG
=
1
W
C
=
=
2
0
After Instruction
REG
W
=
=
0
2
C
Z
N
=
=
=
1
1
0
; result is zero
DS39599C-page 290
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
