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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F2320-I/SP的Datasheet PDF文件第289页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第290页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第291页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第292页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第294页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第295页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第296页浏览型号PIC18F2320-I/SP的Datasheet PDF文件第297页  
PIC18F2220/2320/4220/4320  
SUBLW  
Subtract W from literal  
SUBWF  
Syntax:  
Subtract W from f  
Syntax:  
[ label ] SUBLW k  
0 k 255  
[ label ] SUBWF f [,d [,a]]  
Operands:  
Operation:  
Status Affected:  
Encoding:  
Operands:  
0 f 255  
d [0,1]  
a [0,1]  
k – (W) W  
N, OV, C, DC, Z  
Operation:  
(f) – (W) dest  
0000  
1000  
kkkk  
kkkk  
Status Affected:  
Encoding:  
N, OV, C, DC, Z  
Description:  
W is subtracted from the eight-bit  
literal ‘k’. The result is placed in  
W.  
0101  
11da  
ffff  
ffff  
Description:  
Subtract W from register ‘f’ (2’s  
complement method). If ‘d’ is ‘0’,  
the result is stored in W. If ‘d’ is  
1’, the result is stored back in  
register ‘f’ (default). If = ‘a’ is ‘0’,  
the Access Bank will be selected,  
overriding the BSR value. If ‘a’ is  
1’, then the bank will be selected  
as per the BSR value (default).  
Words:  
Cycles:  
1
1
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
Decode  
Read  
literal ‘k’  
Process  
Data  
Write to W  
SUBLW 0x02  
Example 1:  
Words:  
Cycles:  
1
1
Before Instruction  
W
C
=
=
1
?
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
After Instruction  
Decode  
Read  
register ‘f’  
Process  
Data  
Write to  
destination  
W
=
1
C
=
=
=
1
0
0
; result is positive  
Z
SUBWF REG  
Example 1:  
N
SUBLW 0x02  
Example 2:  
Before Instruction  
REG  
W
C
=
=
=
3
2
?
Before Instruction  
W
C
=
=
2
?
After Instruction  
After Instruction  
REG  
W
=
=
1
2
W
=
0
C
Z
N
=
=
=
1
0
0
; result is positive  
C
Z
N
=
=
=
1
1
0
; result is zero  
SUBWF REG, W  
Example 2:  
SUBLW 0x02  
Example 3:  
Before Instruction  
Before Instruction  
REG  
=
2
2
?
W
C
=
=
3
?
W
C
=
=
After Instruction  
After Instruction  
W
=
FF ; (2’s complement)  
REG  
=
2
0
C
Z
N
=
=
=
0
0
1
; result is negative  
W
=
C
Z
N
=
=
=
1
1
0
; result is zero  
SUBWF REG  
Example 3:  
Before Instruction  
REG  
=
0x01  
W
C
=
=
0x02  
?
After Instruction  
REG  
W
=
=
0xFFh ;(2’s complement)  
0x02  
C
Z
N
=
=
=
0x00 ; result is negative  
0x00  
0x01  
2003 Microchip Technology Inc.  
DS39599C-page 291  
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