PIC18F2220/2320/4220/4320
TABLE 1-3:
Pin Name
PIC18F4220/4320 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Buffer
Description
Type Type
PDIP TQFP QFN
PORTE is a bidirectional I/O port.
RE0/AN5/RD
RE0
8
9
25
26
27
18
25
26
27
18
I/O
I
I
ST
Analog
TTL
Digital I/O.
Analog input 5.
Read control for Parallel Slave Port
(see also WR and CS pins).
AN5
RD
RE1/AN6/WR
RE1
I/O
I
I
ST
Analog
TTL
Digital I/O.
Analog input 6.
Write control for Parallel Slave Port
(see CS and RD pins).
AN6
WR
RE2/AN7/CS
RE2
10
I/O
I
I
ST
Analog
TTL
Digital I/O.
Analog input 7.
Chip select control for Parallel Slave Port
(see related RD and WR).
AN7
CS
RE3
VSS
1
—
P
—
—
See MCLR/VPP/RE3 pin.
12, 6, 29 6, 30,
31 31
Ground reference for logic and I/O pins.
VDD
NC
11, 32 7, 28 7, 8,
28, 29
P
—
Positive supply for logic and I/O pins.
—
—
13
NC
NC No connect.
CMOS = CMOS compatible input or output
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
= Output
OD = Open-drain (no diode to VDD)
I
= Input
O
P
= Power
Note 1: Default assignment for CCP2 when CCP2MX (CONFIG3H<0>) is set.
2: Alternate assignment for CCP2 when CCP2MX is cleared.
DS39599C-page 18
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
