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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
TABLE 1-3:  
Pin Name  
PIC18F4220/4320 PINOUT I/O DESCRIPTIONS (CONTINUED)  
Pin Number  
Pin Buffer  
Type Type  
Description  
PDIP TQFP QFN  
PORTB is a bidirectional I/O port. PORTB can be software  
programmed for internal weak pull-ups on all inputs.  
RB0/AN12/INT0  
RB0  
33  
34  
35  
36  
37  
38  
39  
40  
8
9
I/O  
I
I
TTL  
Analog  
ST  
Digital I/O.  
Analog input 12.  
External interrupt 0.  
AN12  
INT0  
RB1/AN10/INT1  
RB1  
9
10  
11  
12  
14  
15  
16  
17  
I/O  
I
I
TTL  
Analog  
ST  
Digital I/O.  
Analog input 10.  
External interrupt 1.  
AN10  
INT1  
RB2/AN8/INT2  
RB2  
10  
11  
14  
15  
16  
17  
I/O  
I
I
TTL  
Analog  
ST  
Digital I/O.  
Analog input 8.  
External interrupt 2.  
AN8  
INT2  
RB3/AN9/CCP2  
RB3  
I/O  
I
I/O  
TTL  
Analog  
ST  
Digital I/O.  
Analog input 9.  
Capture2 input, Compare2 output, PWM2 output.  
AN9  
CCP2(1)  
RB4/AN11/KBI0  
RB4  
I/O  
I
I
TTL  
Analog  
TTL  
Digital I/O.  
Analog input 11.  
Interrupt-on-change pin.  
AN11  
KBI0  
RB5/KBI1/PGM  
RB5  
I/O  
I
I/O  
TTL  
TTL  
ST  
Digital I/O.  
KBI1  
PGM  
Interrupt-on-change pin.  
Low-voltage ICSP programming enable pin.  
RB6/KBI2/PGC  
RB6  
I/O  
I
I/O  
TTL  
TTL  
ST  
Digital I/O.  
Interrupt-on-change pin.  
In-Circuit Debugger and ICSP programming clock pin.  
KBI2  
PGC  
RB7/KBI3/PGD  
RB7  
I/O  
I
I/O  
TTL  
TTL  
ST  
Digital I/O.  
Interrupt-on-change pin.  
In-Circuit Debugger and ICSP programming data pin.  
KBI3  
PGD  
Legend: TTL = TTL compatible input  
ST = Schmitt Trigger input with CMOS levels  
= Output  
OD = Open-drain (no diode to VDD)  
CMOS = CMOS compatible input or output  
I
= Input  
O
P
= Power  
Note 1: Default assignment for CCP2 when CCP2MX (CONFIG3H<0>) is set.  
2: Alternate assignment for CCP2 when CCP2MX is cleared.  
2003 Microchip Technology Inc.  
DS39599C-page 15