PIC17C4X
Applicable Devices 42 R42 42A 43 R43 44
FIGURE 17-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
VDD
MCLR
30
Internal
POR
33
PWRT
Time-out
32
OSC
Time-out
Internal
RESET
Watchdog
Timer
RESET
31
35
Address /
Data
TABLE 17-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min
Typ†
Max Units
Conditions
30
31
TmcL
Twdt
MCLR Pulse Width (low)
100 *
5 *
—
—
ns
Watchdog Timer Time-out Period
(Prescale = 1)
12
25 *
ms
32
33
Tost
Oscillation Start-up Timer Period
Power-up Timer Period
1024 TOSC §
96
ms TOSC = OSC1 period
ms
Tpwrt
40 *
—
200 *
100 *
35
TmcL2adI MCLR to System Interface bus
(AD15:AD0) invalid
—
ns
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
‡
§
These parameters are for design guidance only and are not tested, nor characterized.
This specification ensured by design.
1996 Microchip Technology Inc.
DS30412C-page 157
MICROCHIP [ MICROCHIP ]
