PIC16F688
REGISTER 8-2:
ADCON0 – A/D CONTROL REGISTER (ADDRESS: 1Fh)
R/W-0
ADFM
R/W-0
VCFG
U-0
—
R/W-0
CHS2
R/W-0
CHS1
R/W-0
CHS0
R/W-0
R/W-0
ADON
GO/DONE
bit 7
bit 0
bit 7
bit 6
ADFM: A/D Result Formed Select bit
1= Right justified
0= Left justified
VCFG: Voltage Reference bit
1= VREF pin
0= VDD
bit 5
Unimplemented: Read as ‘0’
bit 4-2
CHS<2:0>: Analog Channel Select bits
000= Channel 00 (AN0)
001= Channel 01 (AN1)
010= Channel 02 (AN2)
011= Channel 03 (AN3)
100= Channel 04 (AN4)
101= Channel 05 (AN5)
110= Channel 06 (AN6)
111= Channel 07 (AN7)
bit 1
bit 0
GO/DONE: A/D Conversion Status bit
1= A/D conversion cycle in progress. Setting this bit starts an A/D conversion cycle.
This bit is automatically cleared by hardware when the A/D conversion has completed.
0= A/D conversion completed/not in progress
ADON: A/D Conversion Status bit
1= A/D converter module is operating
0= A/D converter is shut off and consumes no operating current
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
- n = Value at POR
REGISTER 8-3:
ADCON1 – A/D CONTROL REGISTER 1 (ADDRESS: 9Fh)
U-0
—
R/W-0
R/W-0
R/W-0
U-0
—
U-0
—
U-0
—
U-0
—
ADCS2
ADCS1
ADCS0
bit 7
bit 0
bit 7
Unimplemented: Read as ‘0’
bit 6-4
ADCS<2:0>: A/D Conversion Clock Select bits
000= FOSC/2
001= FOSC/8
010= FOSC/32
x11= FRC (clock derived from a dedicated internal oscillator = 500 kHz max)
100= FOSC/4
101= FOSC/16
110= FOSC/64
bit 3-0
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
- n = Value at POR
DS41203B-page 66
Preliminary
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
