PIC16F688
The output of the sample and hold is connected to the
input of the converter. The converter generates a
binary result via successive approximation and stores
the result in a 10-bit register. The voltage reference
used in the conversion is software selectable to either
VDD or a voltage applied by the VREF pin. Figure 8-1
shows the block diagram of the A/D on the PIC16F688.
8.0
ANALOG-TO-DIGITAL
CONVERTER (A/D) MODULE
The analog-to-digital converter (A/D) allows conversion
of an analog input signal to a 10-bit binary representa-
tion of that signal. The PIC16F688 has eight analog
inputs, multiplexed into one sample and hold circuit.
FIGURE 8-1:
A/D BLOCK DIAGRAM
VDD
VCFG = 0
VCFG = 1
VREF
RA0/AN0
RA1/AN1/VREF
A/D
RA2/AN2
RA4/AN3
RC0/AN4
10
10
GO/DONE
ADFM
RC1/AN5
RC2/AN6
RC3/AN7
ADON
ADRESH ADRESL
VSS
CHS<2:0>
8.1.3
VOLTAGE REFERENCE
8.1
A/D Configuration and Operation
There are two options for the voltage reference to the
A/D converter: either VDD is used, or an analog voltage
applied to VREF is used. The VCFG bit (ADCON0<6>)
controls the voltage reference selection. If VCFG is set,
then the voltage on the VREF pin is the reference;
otherwise, VDD is the reference.
There are three registers available to control the
functionality of the A/D module:
1. ANSEL (Register 8-1)
2. ADCON0 (Register 8-2)
3. ADCON1 (Register 8-3)
8.1.1
ANALOG PORT PINS
The ANS<7:0> bits (ANSEL<7:0>) and the TRIS bits
control the operation of the A/D port pins. Set the
corresponding TRIS bits to set the pin output driver to
its high-impedance state. Likewise, set the
corresponding ANSEL bit to disable the digital input
buffer.
Note:
Analog voltages on any pin that is defined
as a digital input may cause the input
buffer to conduct excess current.
8.1.2
CHANNEL SELECTION
There are eight analog channels on the PIC16F688,
AN0 through AN7. The CHS<2:0> bits
(ADCON0<4:2>) control which channel is connected to
the sample and hold circuit.
2004 Microchip Technology Inc.
Preliminary
DS41203B-page 63