PIC16F688
The Timer1 Control register (T1CON), shown in
Register 6-1, is used to enable/disable Timer1 and
select the various features of the Timer1 module.
6.0
TIMER1 MODULE WITH GATE
CONTROL
The PIC16F688 has a 16-bit timer. Figure 5-1 shows
the basic block diagram of the Timer1 module. Timer1
has the following features:
Note:
Additional information on timer modules is
available in the “PICmicro® Mid-Range
MCU
Family
Reference
Manual”
• 16-bit timer/counter (TMR1H:TMR1L)
• Readable and writable
(DS33023).
• Internal or external clock selection
• Synchronous or asynchronous operation
• Interrupt-on-overflow from FFFFh to 0000h
• Wake-up upon overflow (Asynchronous mode)
• Optional external enable input
- Selectable gate source: T1G or C2 output
(T1GSS)
- Selectable gate polarity (T1GINV)
• Optional LP oscillator
FIGURE 6-1:
TIMER1 ON THE PIC16F688 BLOCK DIAGRAM
TMR1ON
TMR1GE
T1GINV
TMR1ON
TMR1GE
Set Flag bit
To C2 Comparator Module
TMR1 Clock
TMR1IF on
Overflow
(1)
TMR1
Synchronized
Clock Input
0
TMR1L
TMR1H
1
Oscillator
(2)
T1SYNC
OSC1/T1CKI
1
0
Synchronize
det
Prescaler
1, 2, 4, 8
FOSC/4
Internal
Clock
OSC2/T1G
2
Sleep Input
T1CKPS<1:0>
INTOSC
without CLKOUT
TMR1CS
T1OSCEN
1
0
C2OUT
T1GSS
Note 1: Timer1 increments on the rising edge.
2: ST Buffer is low power type when using LP oscillator or high-speed type when using
T1CKI.
2004 Microchip Technology Inc.
Preliminary
DS41203B-page 49
MICROCHIP [ MICROCHIP ]
