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PIC16F688-I/P 参数 Datasheet PDF下载

PIC16F688-I/P图片预览
型号: PIC16F688-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 14引脚基于闪存的8位CMOS微控制器采用纳瓦技术 [14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 174 页 / 2918 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F688  
TABLE 11-4: INITIALIZATION CONDITION FOR REGISTERS  
Wake-up from Sleep  
through Interrupt  
Wake-up from Sleep  
through WDT Time-out  
MCLR Reset  
Power-on  
Reset  
Register  
Address  
WDT Reset  
Brown-out Detect(1)  
W
xxxx xxxx  
xxxx xxxx  
xxxx xxxx  
0000 0000  
0001 1xxx  
xxxx xxxx  
--xx xx00  
--xx xx00  
---0 0000  
0000 0000  
0000 0000  
xxxx xxxx  
xxxx xxxx  
0000 0000  
01-0 0-00  
-000 0000  
0000 0000  
0000 0000  
0000 0000  
0000 0010  
000x 000x  
---0 1000  
0000 0000  
---- --10  
xxxx xxxx  
00-0 0000  
1111 1111  
--11 1111  
--11 1111  
0000 0000  
--01 --0x  
uuuu uuuu  
xxxx xxxx  
uuuu uuuu  
0000 0000  
000q quuu(4)  
uuuu uuuu  
--00 0000  
--00 0000  
---0 0000  
0000 0000  
0000 0000  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
01-0 0-00  
-000 0000  
0000 0000  
0000 0000  
0000 0000  
0000 0010  
000x 000x  
---0 1000  
0000 0000  
---- --10  
uuuu uuuu  
00-0 0000  
1111 1111  
--11 1111  
--11 1111  
0000 0000  
--0u --uu(1,5)  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
PC + 1(3)  
INDF  
00h/80h/100h/180h  
TMR0  
01h/101h  
PCL  
02h/82h/102h/182h  
STATUS  
FSR  
03h/83h/103h/183h  
uuuq quuu(4)  
uuuu uuuu  
--uu uuuu  
--uu uuuu  
---u uuuu  
uuuu uuuu(2)  
uuuu uuuu(2)  
uuuu uuuu  
uuuu uuuu  
-uuu uuuu  
uu-u u-uu  
-uuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
---u uuuu  
uuuu uuuu  
---- --uu  
uuuu uuuu  
uu-u uuuu  
uuuu uuuu  
--uu uuuu  
--uu uuuu  
uuuu uuuu  
--uu --uu  
04h/84h/104h/184h  
PORTA  
PORTC  
PCLATH  
INTCON  
PIR1  
05h/105h  
07h/107h  
0Ah/8Ah/10Ah/18Ah  
0Bh/8Bh/10Bh/18Bh  
0Ch  
0Eh  
TMR1L  
TMR1H  
T1CON  
BAUDCTL  
SPBRGH  
SPBRG  
RCREG  
TXREG  
TXSTA  
0Fh  
10h  
11h  
12h  
13h  
14h  
15h  
16h  
RCSTA  
WDTCON  
CMCON0  
CMCON1  
ADRESH  
ADCON0  
OPTION_REG  
TRISA  
17h  
18h  
19h  
1Ah  
1Eh  
1Fh  
81h/181h  
85h/185h  
87h/187h  
8Ch  
TRISC  
PIE1  
PCON  
8Eh  
Legend: u= unchanged, x= unknown, — = unimplemented bit, reads as ‘0’, q= value depends on condition.  
Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.  
2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).  
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt  
vector (0004h).  
4: See Table 11-5 for Reset value for specific condition.  
5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.  
2004 Microchip Technology Inc.  
Preliminary  
DS41203B-page 107  
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