PIC12F508/509/16F505
FIGURE 6-5:
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER(1), (2)
TCY (= FOSC/4)
Data Bus
8
0
1
(GP2/RC5)/T0CKI
pin
M
U
X
1
0
M
U
X
Sync
2
Cycles
TMR0 Reg
T0SE
T0CS
PSA
0
1
8-bit Prescaler
M
U
X
8
Watchdog
Timer
8-to-1 MUX
PS<2:0>
PSA
1
0
WDT Enable bit
MUX
PSA
WDT
Time-out
Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register.
2: T0CKI is shared with pin RC5 on the PIC16F505 and pin GP2 on the PIC12F508/509.
© 2007 Microchip Technology Inc.
Preliminary
DS41236C-page 37