PIC12F508/509/16F505
FIGURE 6-3:
TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1:2
PC
(Program
Counter)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
PC – 1 PC PC + 1 PC + 2 PC + 3 PC + 4 PC + 5 PC + 6
MOVWF TMR0 MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W
Instruction
Fetch
T0
T0 + 1
NT0
NT0 + 1
Timer0
Instruction
Executed
Read TMR0
reads NT0 + 1
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0 + 2
Write TMR0
executed
TABLE 6-1:
REGISTERS ASSOCIATED WITH TIMER0
Value on
Power-On
Reset
Value on
All Other
Resets
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3 Bit 2
Bit 1
Bit 0
01h
TMR0
Timer0 – 8-bit Real-Time Clock/Counter
GPWU GPPU T0CS T0SE PSA
PSA
I/O Control Register
RC5 RC4 RC3
xxxx xxxx
1111 1111
1111 1111
--11 1111
--11 1111
uuuu uuuu
1111 1111
1111 1111
--11 1111
--11 1111
(1)
(2)
N/A
OPTION
OPTION
PS2
PS2
PS1
PS1
PS0
PS0
N/A
RBWU
—
RBPU
—
T0CS T0SE
(1), (3)
N/A
TRISGPIO
(2), (3)
N/A
TRISC
—
—
RC2
RC1
RC0
Legend:
Shaded cells are not used by Timer0. – = unimplemented, x = unknown, u= unchanged.
Note 1: PIC12F508/509 only.
2: PIC16F505 only.
3: The TRIS of the T0CKI pin is overridden when T0CS = 1.
DS41236C-page 34
Preliminary
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
